参数资料
型号: MC68HC05V7FN
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC68
封装: PLASTIC, LCC-68
文件页数: 56/170页
文件大小: 589K
代理商: MC68HC05V7FN
SECTION 16: INSTRUCTION SET
MOTOROLA
Page 135
MC68HC05V7 Specification Rev. 1.0
of the bit tested is also placed in the carry bit of the condition code register. The bit set and
bit clear instructions are also read-modify-write instructions and should not be used to
manipulate write-only locations. Refer to the following list for bit manipulation instructions.
16.5
CONTROL INSTRUCTIONS
These instructions are register reference instructions and are used to control processor
operation during program execution. Refer to the following list for control instructions.
16.6
ADDRESSING MODES
The MCU uses ten different addressing modes to provide the programmer with an
opportunity to optimize the code for all situations. The various indexed addressing modes
make it possible to locate data tables, code conversion tables, and scaling tables anywhere
in the memory space. Short indexed accesses are single byte instructions; the longest
instructions (3 bytes) permit accessing tables throughout memory. Short and long absolute
addressing is also included. One- or 2-byte direct addressing instructions access all data
bytes in most applications. Extended addressing permits jump instructions to reach all
memory.
The term “effective address” (EA) is used in describing the various addressing modes.
Effective address is defined as the address from which the argument for an instruction is
fetched or stored.
Function
Set Bit n
Clear Bit n
Mnemonic
BSET n (n = 0. . .7)
BCLR n (n = 0. . .7)
Branch if Bit n is Set
Branch if bit n is Clear
BRSET n (n = 0. . .7)
BRCLR n (n = 0. . .7)
Function
Transfer A to X
Transfer X to A
Set Carry Bit
Clear Carry Bit
Mnemonic
TAX
TXA
SEC
CLC
Set Interrupt Mask Bit
SEI
Clear Interrupt Mask Bit
CLI
Software Interrupt
SWI
Return from Subroutine
RTS
Return from Interrupt
RTI
Reset Stack Pointer
RSP
No-Operation
NOP
Wait
WAIT
Stop
STOP
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