参数资料
型号: MC68HC05V7FN
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC68
封装: PLASTIC, LCC-68
文件页数: 66/170页
文件大小: 589K
代理商: MC68HC05V7FN
MOTOROLA
SECTION 17: ELECTRICAL SPECIFICATIONS
Page 144
MC68HC05V7 Specification Rev. 1.0
17.7
DC ELECTRICAL CHARACTERISTICS
(VDD=3.5-4.5 Vdc ±10%
9, V
SS=0 Vdc, TA=-40°C to +85°C, unless otherwise noted)
NOTES:
1. All values shown reflect average measurements.
2. Typical values at midpoint of voltage range, 25
°C only.
3. Wait I
DD
: Only timer system active.
4. Run (Operating) I
DD
, Wait I
DD
: Measured using external square wave clock source (f
osc
=4.2 MHz), all inputs 0.2 V from rail;
no dc loads, less than 50 pF on all outputs, C
L
=20 pF on OSC2.
5. Wait, Stop I
DD
: All ports configured as inputs, V
IL
=0.2 V, V
IH
=V
DD
-0.2 V.
6. Stop I
DD
measured with OSC1=V
SS
.
7. Wait I
DD
is affected linearly by the OSC2 capacitance.
8. The MDLC will not operate below 4.65 volts.
* Not Tested.
Unit
Max
Typ
Min
Symbol
Characteristic
V
0.1
V
OL
Output voltage
V
DD
-0.1
V
OH
Output High Voltage
V
DD
-0.3
V
OH
(I
Load
= -0.2 mA) PA0-7, PB0-7,PC0-7,PF0-3,PWM
V
Output Low Voltage
0.3
V
OL
(I
Load
= 0.4 mA) PA0-7, PB0-7,PC0-7,PF0-3,PWM
V
Input High Voltage
V
DD
V
IH
Ports A, B, C
V
0.8
×V
DD
Input High Voltage
V
DD
V
IH
Ports D, E,F, IRQ, RESET, OSC1
V
0.7XVDD
I/O Ports Hi-Z Leakage Current
±
±1
I
OZ
PA0-7, PB0-7, PC0-7, PF0-3
A
Input Current
±
±1
I
IN
RESET, IRQ, OSC1, TCAP,SS
A
PD0-PD7,PE0-7
I
IN
±
±1
A
Capacitance*
12
C
OUT
Ports (as Input or Output)
pF
RESET, IRQ, OSC1,OSC2,TCAP,SS
C
IN
—8
—pF
V
I
Load =
10.0
A
TBD
I
DD
I
DD
VDD Supply Current (see Notes)
mA
Run
mA
Wait SPI, TIMER, A/D, PWM, COP and LVR enabled
Stop (Regulator disabled, LVR enabled)
25
°C
0
°C to +70°C (Standard)
-40
°C to +85°C (Extended)
I
DD
I
DD
I
DD
TBD
---
TBD
A
TBD
mA
Wait above modules off
I
DD
TBD
---
25
°C (LVR disabled)
I
DD
TBD
---
A
Input Low Voltage
0.4XV
DD
V
IL
Ports A, B, C
V
VSS
Input Low Voltage
0.3
×V
DD
V
IL
Ports D, E,F, IRQ, RESET, OSC1
V
SS
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