- 您现在的位置：买卖IC网 > PDF目录45223 > MC68HC05V7FN (MOTOROLA INC) 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC68 PDF资料下载
参数资料
| 型号： | MC68HC05V7FN |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC68 |
| 封装： | PLASTIC, LCC-68 |
| 文件页数： | 26/170页 |
| 文件大小： | 589K |
| 代理商： | MC68HC05V7FN |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页当前第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页第151页第152页第153页第154页第155页第156页第157页第158页第159页第160页第161页第162页第163页第164页第165页第166页第167页第168页第169页第170页
SECTION 15: MESSAGE DATA LINK CONTROLLER
MOTOROLA
Page 107
MC68HC05V7 Specification Rev. 1.0
As long as the CPU has possession of the Tx Buffer, the MDLC cannot transmit. Once the
CPU has finished with the contents of the Tx Buffer, it may be "given back" to the MDLC by
writing the message body length ’n’ to the MDLC Tx Control Register (MTCR).
Starting from the first entry of the Tx Buffer, the MDLC fetches each data byte from a filled
entry of the Tx Buffer, the Tx Buffer pointer is incremented and the MDLC attempts to
transmit the data byte onto the J1850 bus. This continues until the last byte of the message
body has been fetched, arbitration is lost or an error occurs. If the transmitted message is
sent error-free then a CRC is appended, the filled Tx Buffer is given back to the CPU, the
Transmitted Message Successfully (TXMS) bit in the MDLC Status Register (MSR) is set,
and a CPU interrupt request is made (if interrupts are enabled). This sequence is then
repeated as long as normal data transmission takes place.
If any type of transmission error is detected by the MDLC as a message is being transmitted
onto the J1850 bus, the internal Tx Buffer pointer will be reset to zero, effectively flushing
the data to be sent, and the MDLC will automatically abort transmission. When this occurs
the MDLC will not generate a CPU interrupt request and will silently wait for the next write
to the MTCR register.
If a loss of arbitration occurs while the MDLC is attempting to transmit a message, the
MDLC will immediately halt transmission and become a receiver. As soon as an idle bus
condition is detected, the MDLC will again attempt to transmit the message onto the
multiplex bus. This automatic retry will continue until the message is transmitted
successfully, an error is detected during transmission, or the TXAB bit is set by the CPU.
Since the Tx Buffer is 11 bytes long, any value greater than or equal to $0C written to the
MTCR register will create a Tx Buffer overflow error and cause the MDLC to not transmit
that message. Attempts to send a zero byte message body length (value of $00 written to
MTCR) will also cause the MDLC to not transmit that message.
At the end of a transmission, successful, unsuccessful or aborted, the MTCR register is
automatically cleared. If interrupts are enabled, the programmer should not poll the MTCR
register to detect this action since each access will clear the TXMS bit in the MSR register!
Instead, since the MDLC receives every message that it sends, the programmer should
check that each message that is attempted to be sent is received back within some
acceptable amount of time before attempting to send another message. Failure to receive
back a message that has been sent in a timely fashion might indicate that some network
fault exists.
相关PDF资料 |
PDF描述 |
|---|---|
| MC68HC05V7CB | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56 |
| MC68HC05V7CFU | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP64 |
| MC68HC05X16FU | 8-BIT, MROM, MICROCONTROLLER, PQFP64 |
| MC68HC705X32FU | 8-BIT, OTPROM, MICROCONTROLLER, PQFP64 |
| MC68HC05X16MFU | 8-BIT, MROM, MICROCONTROLLER, PQFP64 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC68HC05X16 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:High-density complementary metal oxide semiconductor HCMOS) microcontroller unit |
| MC68HC05X32 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:High-density complementary metal oxide semiconductor HCMOS) microcontroller unit |
| MC68HC05X4 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05X4CDW | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05X4DW | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
发布紧急采购，3分钟左右您将得到回复。