- 您现在的位置：买卖IC网 > PDF目录45323 > MP80C31-12D (ATMEL CORP) 8-BIT, 12 MHz, MICROCONTROLLER, PDIP40 PDF资料下载
参数资料
| 型号： | MP80C31-12D |
| 厂商： | ATMEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, 12 MHz, MICROCONTROLLER, PDIP40 |
| 封装： | PLASTIC, DIP-40 |
| 文件页数： | 133/170页 |
| 文件大小： | 4133K |
| 代理商： | MP80C31-12D |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页当前第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页第151页第152页第153页第154页第155页第156页第157页第158页第159页第160页第161页第162页第163页第164页第165页第166页第167页第168页第169页第170页
65
ATtiny4/5/9/10 [DATASHEET]
8127F–AVR–02/2013
The PWM frequency for the output can be calculated by the following equation:
The N variable represents the prescaler divider (1, 8, 64, 256, or 1024).
The extreme values for the OCR0x Register represents special cases when generating a PWM waveform output in
the fast PWM mode. If the OCR0x is set equal to BOTTOM (0x0000) the output will be a narrow spike for each
TOP+1 timer clock cycle. Setting the OCR0x equal to TOP will result in a constant high or low output (depending
on the polarity of the output set by the COM0x1:0 bits.)
A frequency (with 50% duty cycle) waveform output in fast PWM mode can be achieved by setting OC0A to toggle
its logical level on each compare match (COM0A1:0 = 1). The waveform generated will have a maximum fre-
quency of f
0
A = fclk_I/O/2 when OCR0A is set to zero (0x0000). This feature is similar to the OC0A toggle in CTC
mode, except the double buffer feature of the Output Compare unit is enabled in the fast PWM mode.
11.8.4
Phase Correct PWM Mode
The phase correct Pulse Width Modulation or phase correct PWM mode (WGM03:0 = 1, 2, 3, 10, or 11) provides a
high resolution phase correct PWM waveform generation option. The phase correct PWM mode is, like the phase
and frequency correct PWM mode, based on a dual-slope operation. The counter counts repeatedly from BOT-
TOM (0x0000) to TOP and then from TOP to BOTTOM. In non-inverting Compare Output mode, the Output
Compare (OC0x) is cleared on the compare match between TCNT0 and OCR0x while upcounting, and set on the
compare match while downcounting. In inverting Output Compare mode, the operation is inverted. The dual-slope
operation has lower maximum operation frequency than single slope operation. However, due to the symmetric
feature of the dual-slope PWM modes, these modes are preferred for motor control applications.
The PWM resolution for the phase correct PWM mode can be fixed to 8-, 9-, or 10-bit, or defined by either ICR0 or
OCR0A. The minimum resolution allowed is 2-bit (ICR0 or OCR0A set to 0x0003), and the maximum resolution is
16-bit (ICR0 or OCR0A set to MAX). The PWM resolution in bits can be calculated by using the following equation:
In phase correct PWM mode the counter is incremented until the counter value matches either one of the fixed val-
ues 0x00FF, 0x01FF, or 0x03FF (WGM03:0 = 1, 2, or 3), the value in ICR0 (WGM03:0 = 10), or the value in
OCR0A (WGM03:0 = 11). The counter has then reached the TOP and changes the count direction. The TCNT0
value will be equal to TOP for one timer clock cycle. The timing diagram for the phase correct PWM mode is shown
on Figure 11-10 on page 66. The figure shows phase correct PWM mode when OCR0A or ICR0 is used to define
TOP. The TCNT0 value is in the timing diagram shown as a histogram for illustrating the dual-slope operation. The
diagram includes non-inverted and inverted PWM outputs. The small horizontal line marks on the TCNT0 slopes
represent compare matches between OCR0x and TCNT0. The OC0x interrupt flag will be set when a compare
match occurs.
f
OCnxPWM
f
clk_I/O
N1
TOP
+
-----------------------------------
=
R
PCPWM
TOP
1
+
log
2
log
-----------------------------------
=
相关PDF资料 |
PDF描述 |
|---|---|
| MF280C51-20R | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP44 |
| MS80C51-30R | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, PQCC44 |
| MS80C51-20D | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, PQCC44 |
| MF280C31-25R | 8-BIT, 25 MHz, MICROCONTROLLER, PQFP44 |
| MF180C31-16D | 8-BIT, 16 MHz, MICROCONTROLLER, PQFP44 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MP81 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:BRIDGE RECTIFIERS |
| MP810 | 制造商:GOOD-ARK 制造商全称:GOOD-ARK Electronics 功能描述:SILICON BRIDGE RECTIFIERS |
| MP-810 | 制造商:JAMECO BENCHPRO 功能描述:4-Piece Plier/Cutter/Screwdrivers Set |
| MP8100 | 制造商:MPS 制造商全称:Monolithic Power Systems 功能描述:Precision High-Side Current-Sense Amplifier |
| MP8100DS | 制造商:MPS 制造商全称:Monolithic Power Systems 功能描述:Precision High-Side Current-Sense Amplifier |
发布紧急采购，3分钟左右您将得到回复。