参数资料
型号: MPC603RVG200LC
厂商: Freescale Semiconductor
文件页数: 11/31页
文件大小: 0K
描述: MPU RISC PID7V-603E 255FCCBGA
标准包装: 60
系列: MPC6xx
处理器类型: 32-位 MPC603e PowerPC
速度: 200MHz
电压: 2.5V
安装类型: 表面贴装
封装/外壳: 255-BCBGA 裸露焊盘,255-FCCBGA
供应商设备封装: 255-FCCBGA(21x21)
包装: 托盘
PID7t-603e Hardware Specifications, Rev. 5
Freescale Semiconductor
19
Package Descriptions
Interconnects
255
Pitch
1.27 mm (50 mil)
Package height
Minimum: 2.1 mm; Maximum: 2.6 mm
Ball diameter
0.76 mm (30 mil)
Maximum heat sink force
5 lbs
7.2.2
Mechanical Dimensions of the PBGA Package
This figure shows the non-JEDEC package mechanical dimensions and bottom surface nomenclature.
Figure 11. Package Dimensions for the Plastic Ball Grid Array (PBGA)—non-JEDEC Standard
Note that Table 11 lists the pinout to this non-JEDEC standard in order to be consistent with the CBGA
pinout. This figure shows the JEDEC package dimensions of the PBGA package.
T
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
256X
BOTTOM VIEW
E
0.20
6
5
4
3
2
1
b
0.15
C
D
D2
E2
A
B
0.30
C AB
SIDE VIEW
DIM
MIN
MAX
MILLIMETERS
A
2.10
2.60
A1
0.50
0.70
A2
1.10
1.20
A3
0.50
0.70
b
0.60
0.90
D
23.00 BSC
D1
19.05 REF
D2
E
23.00 BSC
E1
19.05 REF
E2
19.40
19.60
NOTES:
1.
DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2.
DIMENSIONS IN MILLIMETERS.
3.
DIMENSION b IS MEASURED AT THE MAXIMUM
SOLDER BALL DIAMETER, PARALLEL TO PRIMARY
DATUM C.
4.
PRIMARY DATUM C AND THE SEATING PLANE ARE
4X
7 8 9 10 11 12 13 14 15
M
TOP VIEW
(D1)
15X
e
15X
e
(E1)
4X
e /2
0.20 C
0.35 C
A3
256X
C
A
A1
A2
SEATING
PLANE
e
1.27 BSC
19.40
19.60
16
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