参数资料
型号: MT46H128M32L4MA-54:A
元件分类: DRAM
英文描述: 128M X 32 DDR DRAM, 5 ns, PBGA168
封装: 12 X 12 MM, GREEN, PLASTIC, WFBGA-168
文件页数: 67/106页
文件大小: 3431K
Figure 27: CAS Latency
CK
CK#
CK
CK#
T0
T1
T2
T2n
T3
T3n
T1n
Command
DQ
DQS
CL = 2
T0
T1
T2
T2n
T3
T3n
Don’t Care
Transitioning Data
READ
NOP
Command
DQ
DQS
CL = 3
READ
NOP
DOUT
n
DOUT
n + 1
DOUT
n + 3
DOUT
n + 2
DOUT
n
DOUT
n + 1
CL - 1
tAC
CL - 1
tAC
Operating Mode
The normal operating mode is selected by issuing a LOAD MODE REGISTER command
with bits A[n:7] each set to zero, and bits A[6:0] set to the desired values.
All other combinations of values for A[n:7] are reserved for future use. Reserved states
should not be used because unknown operation or incompatibility with future versions
may result.
2Gb: x16, x32 Mobile LPDDR SDRAM
Standard Mode Register
PDF: 09005aef83a73286
2gb_ddr_mobile_sdram_t69m.pdf - Rev. M 11/10 EN
63
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
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