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参数资料
| 型号： | MT48LC2M32LFFC |
| 厂商： | Micron Technology, Inc. |
| 英文描述： | 512K x 32 x 4 banks 3.3v SDRAM(3.3V,512K x 32 x 4组同步动态RAM) |
| 中文描述： | 为512k × 32 × 4银行3.3V的内存电压（3.3V，512K采样× 32 × 4组同步动态RAM）的 |
| 文件页数： | 21/50页 |
| 文件大小： | 1054K |
| 代理商： | MT48LC2M32LFFC |
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21
64Mb: x32, 3.3V SDRAM
BatRam_3V.p65 – Rev. 0.7, Pub. 2/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc.
64Mb: x32, 3.3V
SDRAM
PRELIMINARY
Figure 21
Power-Down
DON’T CARE
tRAS
tRC
tRCD
All banks idle
Input buffers gated off
Exit power-down mode.
(
)
(
)
(
)
(
)
(
)
(
)
tCKS
> tCKS
COMMAND
NOP
ACTIVE
Enter power-down mode.
NOP
CLK
CKE
(
)
(
)
(
)
(
)
Figure 20
PRECHARGE Command
Figure 19
Terminating A WRITE Burst
CLK
DQ
T2
T1
T0
COMMAND
ADDRESS
BANK,
COL
n
WRITE
BURST
TERMINATE
NEXT
COMMAND
D
IN
n
(ADDRESS)
(DATA)
NOTE:
DQMs are LOW.
CS#
WE#
CAS#
RAS#
CKE
CLK
A10
HIGH
All Banks
Bank Selected
A0–A9
BA0, 1
ABANK
PRECHARGE command is that it can be used to trun-
cate fixed-length or full-page bursts.
Fixed-length or full-page WRITE bursts can be trun-
cated with the BURST TERMINATE command. When
truncating a WRITE burst, the input data applied coin-
cident with the BURST TERMINATE command will be
ignored. The last data written (provided that DQM is
LOW at that time) will be the input data applied one
clock previous to the BURST TERMINATE command.
This is shown in Figure 19, where data
n
is the last
desired data element of a longer burst.
PRECHA RGE
The PRECHARGE command is used to deactivate
the open row in a particular bank or the open row in all
banks. The bank(s) will be available for a subsequent
row access some specified time (
t
RP) after the
PRECHARGE command is issued. Input A10 deter-
mines whether one or all banks are to be precharged,
and in the case where only one bank is to be precharged,
inputs BA0 and BA1 select the bank. When all banks
are to be precharged, inputs BA0 and BA1 are treated
as “Don’t Care.” Once a bank has been precharged, it is
in the idle state and must be activated prior to any
READ or WRITE commands being issued to that bank.
POWER-DOWN
Power-down occurs if CKE is registered LOW coinci-
dent with a NOP or COMMAND INHIBIT when no ac-
cesses are in progress. If power-down occurs when all
banks are idle, this mode is referred to as precharge
power-down; if power-down occurs when there is a row
active in either bank, this mode is referred to as active
power-down. Entering power-down deactivates the in-
put and output buffers, excluding CKE, for maximum
power savings while in standby. The device may not
remain in the power-down state longer than the re-
fresh period (64ms) since no refresh operations are
performed in this mode.
The power-down state is exited by registering a NOP
or COMMAND INHIBIT and CKE HIGH at the desired
clock edge (meeting
t
CKS).
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