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参数资料
| 型号： | NCP3218MNR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 28/35页 |
| 文件大小： | 0K |
| 描述： | IC CTLR BUCK 7BIT 3PHASE 48QFN |
| 标准包装： | 2,500 |
| 应用： | 控制器，Intel IMVP-6.5? |
| 输入电压： | 3.3 V ~ 22 V |
| 输出数： | 1 |
| 输出电压： | 0.013 V ~ 1.5 V |
| 工作温度： | -40°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-WFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（6x6） |
| 包装： | 带卷 (TR) |
| 其它名称： | NCP3218MNR2G-ND NCP3218MNR2GOSTR |
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ADP3212, NCP3218, NCP3218G
The most effective way to reduce switching loss is to use
lower gate capacitance devices.
The conduction loss of the main MOSFET is given by the
following equation:
R DS is the total low ? side MOSFET on resistance.
C R is the internal ramp capacitor value.
Another consideration in the selection of R R is the size of
the internal ramp voltage (see Equation 19). For stability and
) 1
P C(MF) + D
I O
n MF
2
12
n
I R
n MF
2
R DS(MF)
(eq. 16)
noise immunity, keep the ramp size larger than 0.5 V. Taking
this into consideration, the value of R R in this example is
selected as 280 k W .
The internal ramp voltage magnitude can be calculated as
where R DS(MF) is the on resistance of the MOSFET.
Typically, a user wants the highest speed (low C ISS )
device for a main MOSFET, but such a device usually has
higher on resistance. Therefore, the user must select a device
that meets the total power dissipation (about 0.8 W to 1.0 W
follows:
V R +
V R +
A R (1 * D) V VID
R R C R f SW
0.5 (1 * 0.061) 1.150 V
462 k W 5 pF 280 kHz
+ 0.83 V
(eq. 19)
P DRV +
(n MF
Q GMF ) n SF
Q GSF ) ) I CC
f SW
2
n
R LIM +
I LIM R O
60 m A
R R +
R R +
+ 462 k W
for an 8 ? lead SOIC) when combining the switching and
conduction losses.
For example, an IRF7821 device can be selected as the
main MOSFET (four in total; that is, n MF = 4), with
approximately
C ISS = 1010 pF (maximum) and R DS(MF) = 18 m W
(maximum at T J = 120 ° C), and an IR7832 device can be
selected as the synchronous MOSFET (four in total; that is,
n SF = 4), with
R DS(SF) = 6.7 m W (maximum at T J = 120 ° C). Solving for the
power dissipation per MOSFET at I O = 40 A and I R = 9.0 A
yields 630 mW for each synchronous MOSFET and
590 mW for each main MOSFET. A third synchronous
MOSFET is an option to further increase the conversion
efficiency and reduce thermal stress.
Finally, consider the power dissipation in the driver for
each phase. This is best described in terms of the Q G for the
MOSFETs and is given by the following equation:
VCC
(eq. 17)
where Q GMF is the total gate charge for each main
MOSFET, and Q GSF is the total gate charge for each
synchronous MOSFET.
The previous equation also shows the standby dissipation
(I CC times the VCC) of the driver.
Ramp Resistor Selection
The ramp resistor (R R ) is used to set the size of the internal
PWM ramp. The value of this resistor is chosen to provide
the best combination of thermal balance, stability, and
transient response. Use the following expression to
determine a starting value:
A R L
3 A D R DS C R
(eq. 18)
0.5 360 nH
3 5 5.2 m W 5 pF
where:
A R is the internal ramp amplifier gain.
A D is the current balancing amplifier gain.
The size of the internal ramp can be increased or
decreased. If it is increased, stability and transient response
improves but thermal balance degrades. Conversely, if the
ramp size is decreased, thermal balance improves but
stability and transient response degrade. In the denominator
of Equation 18, the factor of 3 sets the minimum ramp size
that produces an optimal combination of good stability,
transient response, and thermal balance.
Current Limit Setpoint
To select the current limit setpoint, the resistor value for
R CLIM must be determined. The current limit threshold for
the APD3212/NCP3218/NCP3218G is set with R CLIM .
R CLIM can be found using the following equation:
(eq. 20)
where:
R LIM is the current limit resistor.
R O is the output load line.
I LIM is the current limit setpoint.
When the APD3212/NCP3218/NCP3218G is configured
for 3 phase operation, the equation above is used to set the
current limit. When the APD3212/NCP3218/NCP3218G
switches from 3 phase to 1 phase operation by PSI or
DPRSLP signal, the current is single phase is one third of the
current limit in 3 phase.
When the APD3212/NCP3218/NCP3218G is configured
for 2 phase operation, the equation above is used to set the
current limit. When the APD3212/NCP3218/NCP3218G
switches from 2 phase to 1 phase operation by PSI or
DPRSLP signal, the current is single phase is one half of the
current limit in 2 phase.
When the APD3212/NCP3218/NCP3218G is configured
for 1 phase operation, the equation above is used to set the
current limit.
Current Monitor
The APD3212/NCP3218/NCP3218G has output current
monitor. The IMON pin sources a current proportional to the
total inductor current. A resistor, R MON , from IMON to
FBRTN sets the gain of the output current monitor. A 0.1 m F
is placed in parallel with R MON to filter the inductor current
http://onsemi.com
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