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参数资料
| 型号： | NCP3218MNR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 31/35页 |
| 文件大小： | 0K |
| 描述： | IC CTLR BUCK 7BIT 3PHASE 48QFN |
| 标准包装： | 2,500 |
| 应用： | 控制器，Intel IMVP-6.5? |
| 输入电压： | 3.3 V ~ 22 V |
| 输出数： | 1 |
| 输出电压： | 0.013 V ~ 1.5 V |
| 工作温度： | -40°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-WFQFN 裸露焊盘 |
| 供应商设备封装： | 48-QFN（6x6） |
| 包装： | 带卷 (TR) |
| 其它名称： | NCP3218MNR2G-ND NCP3218MNR2GOSTR |
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ADP3212, NCP3218, NCP3218G
5V
7. Measure the output ripple with no load and with a
VCC
37
R TTSET3
full load with scope, making sure both are within
the specifications.
ADP3212
R
R TTSET1 R TTSET2
Set the AC Load Line
VRTT
?
+
TTSNS
R
11
C TT
R TH1
R TH3
R TH2
1. Remove the dc load from the circuit and connect a
dynamic load.
2. Connect the scope to the output voltage and set it
to dc coupling mode with a time scale of
Figure 34. Multiple ? Point Thermal Monitoring
The number of hot spots monitored is not limited. The
alarm temperature of each hot spot can be individually set by
using different values for R TTSET1 , R TTSET2 , ... R TTSETn .
Tuning Procedure for
APD3212/NCP3218/NCP3218G
Set Up and Test the Circuit
1. Build a circuit based on the compensation values
computed from the design spreadsheet.
2. Connect a dc load to the circuit.
3. Turn on the APD3212/NCP3218/NCP3218G and
verify that it operates properly.
4. Check for jitter with no load and full load
conditions.
100 m s/div.
3. Set the dynamic load for a transient step of about
40 A at 1 kHz with 50% duty cycle.
4. Measure the output waveform (note that use of a
dc offset on the scope may be necessary to see the
waveform). Try to use a vertical scale of
100 mV/div or finer.
5. The resulting waveform will be similar to that
shown in Figure 35. Use the horizontal cursors to
measure V ACDRP and V DCDRP , as shown in
Figure 35. Do not measure the undershoot or
overshoot that occurs immediately after the step.
Set the DC Load Line
1. Measure the output voltage with no load (V NL )
and verify that this voltage is within the specified
tolerance range.
2. Measure the output voltage with a full load when
the device is cold (V FLCOLD ). Allow the board to
run for ~10 minutes with a full load and then
V ACDRP
V DCDRP
R CS2(NEW) + R CS2(OLD)
V NL * V FLCOLD
V NL * V FLHOT
R PH(NEW) + R PH(OLD)
R OMEAS
R O
C CS(NEW) + C CS(OLD)
V ACDRP
V DCDRP
measure the output when the device is hot
(V FLHOT ). If the difference between the two
measured voltages is more than a few millivolts,
adjust R CS2 using Equation 40.
(eq. 40)
3. Repeat Step 2 until no adjustment of R CS2 is
needed.
4. Compare the output voltage with no load to that
with a full load using 5 A steps. Compute the load
line slope for each change and then find the
average to determine the overall load line slope
(R OMEAS ).
5. If the difference between R OMEAS and R O is more
than 0.05 m W , use the following equation to adjust
the R PH values:
(eq. 41)
6. Repeat Steps 4 and 5 until no adjustment of R PH is
needed. Once this is achieved, do not change R PH ,
R CS1 , R CS2 , or R TH for the rest of the procedure.
Figure 35. AC Load Line Waveform
6. If the difference between V ACDRP and V DCDRP is
more than a couple of millivolts, use Equation 42
to adjust C CS . It may be necessary to try several
parallel values to obtain an adequate one because
there are limited standard capacitor values
available (it is a good idea to have locations for
two capacitors in the layout for this reason).
(eq. 42)
7. Repeat Steps 5 and 6 until no adjustment of C CS is
needed. Once this is achieved, do not change C CS
for the rest of the procedure.
8. Set the dynamic load step to its maximum step size
(but do not use a step size that is larger than
needed) and verify that the output waveform is
square, meaning V ACDRP and V DCDRP are equal.
9. Ensure that the load step slew rate and the
powerup slew rate are set to ~150 A/ m s to
250 A/ m s (for example, a load step of 50 A should
take 200 ns to 300 ns) with no overshoot. Some
http://onsemi.com
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