PRODUCTPREVIEW
PgaP
R
50k
W
2
R
20k
(forGain=6)
W
1
R
50k
W
2
FromMuxP
PgaN
FromMuxN
ToADC
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SBAS459C – JANUARY 2010 – REVISED MARCH 2010
Supply Measurements (MVDDP, MVDDN)
Setting CHnSET[2:0] = 011 sets the channel inputs to different supply voltages of the device. For channels 1, 2,
5, 6, 7, and 8, (MVDDP – MVDDN) is [0.5 × (AVDD + AVSS)]; for channel 3, (MVDDP – MVDDN) is DVDD/2;
and for channel 4, (MVDDP – MVDDN) is DVDD/2. Note that to avoid saturating the PGA while measuring power
supplies, the gain must be set to '1'.
Lead-Off Excitation Signals (LoffP, LoffN)
The lead-off excitation signals are fed into the multiplexer before the switches. The comparators that detect the
lead-off condition are also connected to the multiplexer block before the switches. For a detailed description of
Auxiliary Single-Ended Input
The RLD_IN pin is primarily used for routing the right leg drive signal to any of the electrodes in case the right leg
drive electrode falls off. However, the RLD_IN pin can be used as a multiple single-ended input channel. The
signal at the RLD_IN pin can be measured with respect to the voltage at the RLD_REF pin using any of the eight
channels. This measurement is done by setting the channel multiplexer setting to '010' and the RLD_MEAS bit of
the CONFIG3 register to '1'.
PGA SETTINGS AND INPUT RANGE
The PGA is a differential input/differential output amplifier, as shown in
Figure 12. It has seven gain settings (1,
Settings subsection of the
Register Map section for details). The ADS1294/6/8 have CMOS inputs and hence
have negligible current noise.
Table 6 shows the typical values of bandwidths for various gain settings. Note that
Table 6 shows the small-signal bandwidth. For large signals, the performance is limited by the slew rate of the
PGA.
Figure 12. PGA Implementation
Table 6. PGA Gain versus Bandwidth
NOMINAL BANDWIDTH AT ROOM
GAIN
TEMPERATURE (kHz)
1
237
2
146
3
127
4
96
6
64
8
48
12
32
Copyright 2010, Texas Instruments Incorporated
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