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参数资料
| 型号： | PADS1298CZXGT |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PBGA64 |
| 封装： | 8 X 8 MM, LEAD FREE, PLASTIC, NFBGA-64 |
| 文件页数： | 4/73页 |
| 文件大小： | 957K |
| 代理商： | PADS1298CZXGT |
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PRODUCTPREVIEW
SBAS459C – JANUARY 2010 – REVISED MARCH 2010
www.ti.com
PAG PIN ASSIGNMENTS (continued)
NAME
TERMINAL
FUNCTION
DESCRIPTION
IN1N(1)
15
Analog input
Differential analog negative input 1
IN1P(1)
16
Analog input
Differential analog positive input 1
TESTP_PACE_OUT1
17
Analog input/buffer output
Internal test signal/single-ended buffer output based on register settings
TESTN_PACE_OUT2
18
Analog input/output
Internal test signal/single-ended buffer output based on register settings
AVDD
19
Supply
Analog supply
AVSS
20
Supply
Analog ground
AVDD
21
Supply
Analog supply
AVDD
22
Supply
Analog supply
AVSS
23
Supply
Analog ground
VREFP
24
Analog input/output
Positive reference voltage
VREFN
25
Analog input
Negative reference voltage
VCAP4
26
Analog output
Analog bypass capacitor
NC
27
—
No connection
VCAP1
28
—
Analog bypass capacitor
NC
29
—
No connection
VCAP2
30
—
Analog bypass capacitor
RESV1
31
Digital input
Reserved for future use. Must tie to logic low (DGND)
AVSS
32
Supply
Analog ground
DGND
33
Supply
Digital ground
DIN
34
Digital input
SPI data in
PWDN
35
Digital input
Power-down; active low
RESET
36
Digital input
System reset; active low
CLK
37
Digital input
Master clock input
START
38
Digital input
Start conversion
CS
39
Digital input
SPI chip select; active low
SCLK
40
Digital input
SPI clock
DAISY_IN
41
Digital input
Daisy-chain input
GPIO1
42
Digital input/output
General purpose input/output pin
DOUT
43
Digital output
SPI data out
GPIO2
44
Digital input/output
General-purpose input/output pin
GPIO3
45
Digital input/output
GPIO3 in normal mode, RESP in respiration mode
GPIO4
46
Digital input/output
GPIO4 in normal mode, RESP_PH in respiration mode
DRDY
47
Digital output
Data ready; active low
DVDD
48
Supply
Digital power supply
DGND
49
Supply
Digital ground
DVDD
50
Supply
Digital power supply
DGND
51
Supply
Digital ground
CLKSEL
52
Digital input
Master clock select
AVSS1
53
Supply
Analog ground
AVDD1
54
Supply
Analog supply
VCAP3
55
Analog
Analog bypass capacitor
AVDD
56
Supply
Analog supply
AVSS
57
Supply
Analog ground
AVSS
58
Supply
Analog ground for charge pump
AVDD
59
Supply
Analog supply for charge pump
RLDREF
60
Analog input
Right leg drive noninverting input
RLDINV
61
Analog input/output
Right leg drive inverting input
RLDIN
62
Analog input
Right leg drive input to MUX
RLDOUT
63
Analog output
Right leg drive output
WCT
64
Analog output
Wilson Center Terminal output
12
Copyright 2010, Texas Instruments Incorporated
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