PRODUCTPREVIEW
SBAS459C – JANUARY 2010 – REVISED MARCH 2010
www.ti.com
CLOCK
The ADS1294/6/8 provide two different methods for device clocking: internal and external. Internal clocking is
ideally suited for low-power, battery-powered systems. The internal oscillator is trimmed for accuracy at room
selection is controlled by the CLKSEL pin and the CLK_EN register bit.
The CLKSEL pin selects either the internal or external clock. The CLK_EN bit in the CONFIG1 register enables
and disables the oscillator clock to be output in the CLK pin. A truth table for these two pins is shown in
Table 7.The CLK_EN bit is useful when multiple devices are used in a daisy-chain configuration. It is recommended that
during power-down the external clock is shut down to save power.
Table 7. CLKSEL Pin and CLK_EN Bit
CLKSEL PIN
CLK_EN BIT
CLOCK SOURCE
CLK PIN STATUS
0
X
External clock
Input: external clock
1
0
Internal clock oscillator
3-state
1
Internal clock oscillator
Output: internal clock oscillator
DATA FORMAT
The ADS1294/6/8 outputs 24 bits of data per channel in binary twos complement format, MSB first. The LSB has
a weight of VREF/(2
23 – 1). A positive full-scale input produces an output code of 7FFFFFh and the negative
full-scale input produces an output code of 800000h. The output clips at these codes for signals exceeding
full-scale.
Table 8 summarizes the ideal output codes for different input signals. Note that for DR[2:0] = 000 and
001, the device has only 16 bits of resolution.
Table 8. Ideal Input Code versus Input Signal
INPUT SIGNAL, VIN
(AINP – AINN)
IDEAL OUTPUT CODE(1)
≥ VREF
7FFFFFh
+VREF/(2
23 – 1)
000001h
0
000000h
–VREF/(2
23 – 1)
FFFFFFh
≤ –VREF (2
23/223 – 1)
800000h
(1)
Excludes effects of noise, linearity, offset, and gain error.
24
Copyright 2010, Texas Instruments Incorporated