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参数资料
| 型号： | PADS1298CZXGT |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PBGA64 |
| 封装： | 8 X 8 MM, LEAD FREE, PLASTIC, NFBGA-64 |
| 文件页数： | 13/73页 |
| 文件大小： | 957K |
| 代理商： | PADS1298CZXGT |
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PRODUCTPREVIEW
AVDD
0.2
-
GainV
MAX_DIFF
2
<CM<AVSS+0.2+
GainV
MAX_DIFF
2
Max(INP
INN)<
-
V
REF
Gain
Full-ScaleRange=
±
V
REF
Gain
;
60
70
80
90
100
110
120
130
140
150
-
NormalizedFrequency(Hz)
P
ower
-SupplyDensity(dB)
10
1
10
2
10
0
10
3
SBAS459C – JANUARY 2010 – REVISED MARCH 2010
www.ti.com
The resistor string of the PGA that implements the gain has 120k
of resistance for a gain of 6. This resistance
provides a current path across the outputs of the PGA in the presence of a differential input signal. This current
is in addition to the quiescent current specified for the device in the presence of differential signal at input.
Input Common-Mode Range
The usable input common-mode range of the front end depends on various parameters, including the maximum
differential input signal, supply voltage, PGA gain, etc. This range is described in Equation 2:
where:
VMAX_DIFF = maximum differential signal at the input of the PGA
CM = common-mode range
(2)
For example:
If VDD = 3V, gain = 6, and VMAX_DIFF = 350mV
Then 1.25V < CM < 1.75V
Input Differential Dynamic Range
The differential (INP – INN) signal range depends on the analog supply and reference used in the system. This
range is shown in Equation 3.
(3)
The 3V supply, with a reference of 2.4V and a gain of 6 for ECGs, is optimized for power with a differential input
signal of approximately 300mV. For higher dynamic range, a 5V supply with a reference of 4V (set by the
VREF_4V bit of the CONFIG3 register) can be used to increase the differential dynamic range.
ADC
ΔΣ Modulator
Each channel of the ADS1294/6/8 has a 24-bit
ΔΣ ADC. This converter uses a second-order modulator
optimized for low-power applications. The modulator samples the input signal at the rate of fMOD = fCLK/4 for
high-resolution mode and fMOD = fCLK/8 for the low-power mode. As in the case of any ΔΣ modulator, the noise of
the ADS1294/6/8 is shaped until fMOD/2, as shown in Figure 13. The on-chip digital decimation filters explained in
the next section can be used to filter out the noise at higher frequencies. These on-chip decimation filters also
provide antialias filtering. This feature of the
ΔΣ converters drastically reduces the complexity of the analog
antialiasing filters that are typically needed with nyquist ADCs.
Figure 13. Modulator Noise Spectrum Up To 0.5 × fMOD
20
Copyright 2010, Texas Instruments Incorporated
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