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参数资料
| 型号： | PC13892AJVK |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA139 |
| 封装： | 7 X 7 MM, 0.50 MM PITCH, ROHS COMPLIANT, PLASTIC, MO-195AD, MABGA-139 |
| 文件页数： | 31/67页 |
| 文件大小： | 2571K |
| 代理商： | PC13892AJVK |
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Table 7. Standby Control Pins
STANDBY (PIN)
STANDBYINV (SPI BIT)
STANDBYSEC (PIN)
STANDBYSECINV (SPI BIT)
STANDBY
CONTROL(27)
0
x
0
x
0
1
x
0
x
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Notes
27.
STANDBY = 0: System is not in Standby; STANDBY=1: System is in Standby and Standby programmability is activated.
Analog Integrated Circuit Device Data
Freescale Semiconductor
37
13892
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: MC13892*VK and MC13892*VL in 139, 186 MAPBGA packages.
The state of the Standby pins only have influence in the On
mode and are therefore ignored during start up and in the
Watchdog phase. This allows the system to power up without
concern of the required Standby polarities, since software
can make adjustments accordingly, as soon as it is running.
INT
Interrupt to processor. Unmasked interrupt events are
signaled to the processor by driving the INT pin high.
PWRON1, 2 AND 3
A turn on event can be accomplished by connecting an
open drain NMOS driver to the PWRONx pin of the 13892, so
that it is in effect a parallel path for the power key.
In addition to the turn on event, the 13892A/B versions
include a global reset feature on the PWRON3 pin. The
13892A version has the global reset feature enabled by
default. The 13892B version has the global reset feature
disabled by default, but can be enabled by setting the SPI bit
GLBRSTENB = 0. The global reset feature powers down the
part, disables the charger, resets the SPI registers to their
default value and then powers back on. To enable a global
reset the PWRON3 pin needs to be pulled low for greater
than 12 seconds and then pulled back high. If the PWRON3
pin is held low for less than 12 seconds the pin will act as a
normal PWRON pin.
PUMS1 AND PUMS2
Power up mode supply setting. Default start-up of the
device is selectable by hardwiring the Power Up Mode Select
pins. The Power Up Mode Select pins (PUMS1 and PUMS2)
are used to configure the start-up characteristics of the
regulators. Supply enabling and output level options are
selected by hardworking the PUMS pins for the desired
configuration.
The following power up defaults table shows the initial
setup for the voltage level of the switchers and regulators,
and if they get enabled or not, according to the PUMS pins
configuration.
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相关代理商/技术参数 |
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|---|---|
| PC13892AJVKR2 | 制造商:Freescale Semiconductor 功能描述:POWER MGMT IC - Tape and Reel |
| PC13892AJVL | 制造商:Freescale Semiconductor 功能描述:5/28V BCK/BST PMUIC - Bulk |
| PC13892AJVLR2 | 制造商:Freescale Semiconductor 功能描述:5/28V BCK/BST PMUIC - Tape and Reel |
| PC13892BJVL | 制造商:Freescale Semiconductor 功能描述:5/28V BCK/BST PMUIC - Trays |
| PC13892JVK | 制造商:Freescale Semiconductor 功能描述:POWER MGMT IC - Bulk |
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