参数资料
型号: PC13892AJVK
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 电源管理
英文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA139
封装: 7 X 7 MM, 0.50 MM PITCH, ROHS COMPLIANT, PLASTIC, MO-195AD, MABGA-139
文件页数: 38/67页
文件大小: 2571K
代理商: PC13892AJVK
Analog Integrated Circuit Device Data
Freescale Semiconductor
43
13892
FUNCTIONAL DEVICE OPERATION
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: MC13892*VK and MC13892*VL in 139, 186 MAPBGA packages.
COIN CELL BATTERY BACKUP
The LICELL pin provides a connection for a coin cell
backup battery or supercap. If the main battery is deeply
discharged, removed, or contact-bounced (i.e., during a
power cut), the RTC system and coin cell maintained logic
will switch over to the LICELL for backup power. A small
capacitor should be placed from LICELL to ground under all
circumstances.
Coin cells can get damaged and their lifetime reduced
when deeply discharged. In order to avoid this, the internal
circuitry supplied from LICELL is disconnected for voltages
below the coin cell disconnect threshold. This will also cause
the ADC reading of the coin cell voltage to yield zero.
The coin cell charger circuit will function as a current-
limited voltage source, resulting in the CC/CV taper
characteristic typically used for rechargeable Lithium-Ion
batteries. The coin cell voltage is programmable from 2.5 to
3.3 V in 0.1 V steps, excepting 2.6 V. The coin cell charger
voltage is programmable in the ON state where the charge
current is fixed at ICOINHI. When the device is working in any
of the low Power Off modes, the coin cell charger will also go
into a low power mode in which the current it supplies to the
coin cell will be reduced in order to save power.
Table 11. 13892 Coin Cell Battery Electrical Characteristics
PARAMETER
TYP
UNITS
Voltage Accuracy
100
mV
Coin Cell Charge Current in On and Watchdog modes ICOINHI
60
A
Coin Cell Charge Current in Off and Low Power Off modes (User Off/Memory Hold) ICOINLO
10
A
Current Accuracy
30
%
LICELL Bypass Capacitor
100
nF
LICELL Bypass Capacitor as coin cell
4.7
F
CONTROL INTERFACE SPI/I2C
The IC contains a number of programmable registers for
control and communication. The majority of registers are
accessed through an SPI interface in a typical application.
The same register set may be alternatively accessed with an
I2C interface that is muxed on SPI pins. The following table
describes the muxed pin options for the SPI and I2C
interfaces.
Table 12. 13892 Muxed Pin Options for SPI and I2C Interfaces (SPI Functions)
PIN NAME
SPI MODE FUNCTIONALITY
CS
Configuration (37)
Chip Select
CLK
SPI Clock
MISO
Master In, Slave Out (data input)
MOSI
Master Out, Slave In (data input)
Notes
37.
CS held low at Cold Start configures the interface for SPI mode; once activated,
CS functions as the SPI Chip Select.
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