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参数资料
| 型号： | PC13892AJVK |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA139 |
| 封装： | 7 X 7 MM, 0.50 MM PITCH, ROHS COMPLIANT, PLASTIC, MO-195AD, MABGA-139 |
| 文件页数： | 58/67页 |
| 文件大小： | 2571K |
| 代理商： | PC13892AJVK |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
61
13892
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: MC13892*VK and MC13892*VL in 139, 186 MAPBGA packages.
to avoid problems with supply sequencing or transient current
surges. The power gating switch drivers and integrated
control are included for optimizing the system power tree.
The power gate drivers could be used for other general
power gating as well. The text herein assumes the standard
application of PWGT1 for core supply power gating and
PWGT2 for Memory Hold power gating.
USER OFF POWER GATING
User Off configuration maintains PFM mode switchers on
both the processor and external memory power domains.
PWGTDRV1 is provided for power gating peripheral loads
sharing the processor core supply domain(s) SW1, and/or
SW2, and/or SW3. In addition, PWGTDRV2 provides support
to power gate peripheral loads on the SW4 supply domain.
In a typical application, SW1, SW2, and SW3 will be kept
active for the processor modules in state retention, and SW4
will be retained for the external memory in self refresh mode.
SW1, SW2, and SW3 power gating FETs drive would
typically be connected to PWGTDRV1 (for parallel NMOS
switches). The SW4 power gating FET drive would typically
be connected to PWGTDRV2. When low power Off mode is
activated, the power gate drive circuitry will be disabled,
turning off the NMOS power gate switches, to isolate the
maintained supply domains from any peripheral loading.
MEMORY HOLD POWER GATING
As with the User Off power gating strategy described
previously, Memory Hold power gating is intended to allow
isolation of the SW4 power domain to selected circuitry in low
power modes, while cutting off the switcher domain from
other peripheral loads. The only difference is that processor
supplies SW1, and/or SW2, and/or SW3 are shut down in
Memory Hold, so just the external memory is maintained in
self-refresh mode.
An external NMOS is to be placed between the direct-
connected memory supply and any peripheral loading. The
PWGTDRV2 pin controls the gate of the external NMOS, and
is normally pulled up to a charge pumped voltage (~5.0 V).
During Memory Hold or User Off, PWGTDRV2 will go low to
turn off the NMOS switch and isolate memory on the SW4
power domain.
POWER DISSIPATION
During operation, the temperature of the die should not
exceed the maximum junction temperature. Depending on
the operating ambient temperature and the total internal
dissipation, this limit can be exceeded. To optimize the
thermal management scheme and avoid overheating, the
13892 provides a thermal management system. The thermal
protection is based on a circuit with a voltage output that is
proportional to the absolute temperature. This voltage can be
read out via the ADC for precise temperature readouts (See
THERMAL PROTECTION
Thermal protection is integrated to power off the 13892
and disable the charger circuitry in case of over dissipation.
This thermal protection will act above the maximum junction
temperature to avoid any unwanted power downs. The
protection is debounced by one period of the 32kHz clock in
order to suppress any (thermal) noise. This protection should
be considered as a fail-safe mechanism and therefore the
application design should be dimensioned such that this
protection is not tripped under normal conditions. The
temperature thresholds are listed in the last section of
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| PC13892AJVKR2 | 制造商:Freescale Semiconductor 功能描述:POWER MGMT IC - Tape and Reel |
| PC13892AJVL | 制造商:Freescale Semiconductor 功能描述:5/28V BCK/BST PMUIC - Bulk |
| PC13892AJVLR2 | 制造商:Freescale Semiconductor 功能描述:5/28V BCK/BST PMUIC - Tape and Reel |
| PC13892BJVL | 制造商:Freescale Semiconductor 功能描述:5/28V BCK/BST PMUIC - Trays |
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