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参数资料
| 型号： | PC13892AJVK |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA139 |
| 封装： | 7 X 7 MM, 0.50 MM PITCH, ROHS COMPLIANT, PLASTIC, MO-195AD, MABGA-139 |
| 文件页数： | 52/67页 |
| 文件大小： | 2571K |
| 代理商： | PC13892AJVK |
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Analog Integrated Circuit Device Data
56
Freescale Semiconductor
13892
FUNCTIONAL DEVICE OPERATION
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: MC13892*VK and MC13892*VL in 139, 186 MAPBGA packages.
The dummy conversion inserted between the different
readings is to allow the references in the system to be pre-
biased for the change in touch screen plate polarity and will
read out as ‘0’.
MODES OF OPERATION
In inactive mode, the inputs TSX1, TSX2, TSY1, and TSY2
can be used as general purpose inputs. They are respectively
mapped on ADC channels 4, 5, 6, and 7.
In interrupt mode, a voltage is applied to the X-plate
(TSX2) via a weak current source to VCORE, while the Y-
plate is connected to ground (TSY1). When the two plates
make contact both will be at a low potential. This will generate
a pen interrupt TSI to the processor. This detection does not
make use of the ADC core or the TSREF regulator, so both
can remain disabled.
In touch screen mode, the XY coordinate pairs and the
contact resistance are read. The X-coordinate is determined
by applying TSREF over the TSX1 and TSX2 pins while
performing a high-impedance reading on the Y-plate through
TSY1. The Y-coordinate is determined by applying TSREF
between TSY1 and TSY2 while reading the TSX1 pin. The
contact resistance is measured by applying a known current
into the TSY1 terminal of the touch screen and through the
terminal TSX2, which is grounded. The voltage difference
between the two remaining terminals TSY2 and TSX1 is
measured by the ADC, and equals the voltage across the
contact resistance. Measuring the contact resistance helps in
determining if the touch screen is touched with a finger or
stylus.
LED DRIVERS FOR LIGHTING SYSTEM
BACKLIGHT LED DRIVERS
The lighting system includes backlight drivers for main
display, auxiliary display, and keypad. Three additional
drivers are provided for RGB or general purpose signaling.
Ramp up and ramp down patterns are implemented in
hardware to reduce the burden of real time software control
via the SPI, to orchestrate dimming and soft start lighting
effects.
The current level is programmable in a low range mode
and in a high range mode from 0 to 21 mA and from 0 to
42 mA respectively. This facilitates the current setting, in
case two or more serial LED strings are connected in parallel
to the same driver, or when using super bright LEDs.
An external boost is required to drive the backlight LEDs.
A maximum of only two backlight drivers can be activated at
the same time, for instance the main display plus keypad. If
all three backlight drivers are enabled meaning none of the
duty cycles equals 0/32, then none of the drivers will be
activated.
SIGNALING LED DRIVERS
The signaling LED drivers LEDR, LEDG, and LEDB are
independent current sink channels. Each driver channel
features programmable current levels from 0 to 21 mA as well
as programmable PWM duty cycle settings. By a combination
of level and PWM settings, each channel provides flexible
LED intensity control. By driving LEDs of different colors,
color mixing can be achieved.
Blue LEDs or bright green LEDs require more headroom
than red and normal green signal LEDs. In the application, a
5.0 V or equivalent supply rail is therefore required. This is
provided by the integrated boost converter SWBST. As with
the backlight driver channels, the signaling LED drivers
include ramp up and ramp down patterns are implemented in
hardware.
In addition, programmable blink rates are provided.
Blinking is obtained by lowering the PWM repetition rate of
each of the drivers, while the on period is determined by the
duty cycle setting. To avoid high frequency spur coupling in
the application, the switching edges of the output drivers are
softened.”
CONNECTIVITY (USB INTERFACE)
The 13892 contains the regulators required to supply the
PHY contained in the i.MX51, i.MX37, i.MX35, and i.MX27
processors. The regulators used to power the external PHY
in the i.MX51 and i.MX37 are VUSB, VUSB2, and VUSB for
the i.MX35 and i.MX27 processors. The IC also provides the
5.0 V supply for USB OTG operation. The USB interface may
be used for portable product battery charging. Finally
included are comparators/detectors for VBUS and ID
detection. VBUS is the power rail of the USB cable that must
be connected to the UVBUS pin.
The USB interface is illustrated in Figure 12.
3
Y position
4
Y position
5
Dummy
6
Contact resistance
7
Contact resistance
Table 16. 13892 Touch Screen ADC Readings
ADC CONVERSION
SIGNALS SAMPLED
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相关代理商/技术参数 |
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|---|---|
| PC13892AJVKR2 | 制造商:Freescale Semiconductor 功能描述:POWER MGMT IC - Tape and Reel |
| PC13892AJVL | 制造商:Freescale Semiconductor 功能描述:5/28V BCK/BST PMUIC - Bulk |
| PC13892AJVLR2 | 制造商:Freescale Semiconductor 功能描述:5/28V BCK/BST PMUIC - Tape and Reel |
| PC13892BJVL | 制造商:Freescale Semiconductor 功能描述:5/28V BCK/BST PMUIC - Trays |
| PC13892JVK | 制造商:Freescale Semiconductor 功能描述:POWER MGMT IC - Bulk |
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