参数资料
型号: PC13892AJVK
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 电源管理
英文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA139
封装: 7 X 7 MM, 0.50 MM PITCH, ROHS COMPLIANT, PLASTIC, MO-195AD, MABGA-139
文件页数: 46/67页
文件大小: 2571K
代理商: PC13892AJVK
Analog Integrated Circuit Device Data
50
Freescale Semiconductor
13892
FUNCTIONAL DEVICE OPERATION
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: MC13892*VK and MC13892*VL in 139, 186 MAPBGA packages.
peripherals at the SPIVCC level (powered from SW4), and a
higher voltage interface level associated with other
peripherals not compatible with the 1.8 V SPIVCC. VIOHI is
provided at a fixed nominal output voltage 2.775 V level
(VNOM as referred in Table 4) for such interfaces, and may
also be applied to other system needs within the guidelines
of the regulator specifications. The input VINIOHI is not only
used by the VIOHI regulator, but also by other blocks.
Therefore it should always be connected to BP, even if the
VIOHI regulator is not used by the system.
VIOHI has an internal PMOS pass FET which will support
loads up to 100 mA.
CAMERA
The camera module is supplied by the regulator VCAM.
This allows for powering the entire module independent of the
rest of other parts of the system, as well as to select from a
number of VCAM output levels for camera vendor flexibility.
In applications with a dual camera, it is anticipated that only
one of the two cameras is active at a time, allowing the VCAM
supply to be shared between them.
VCAM has an internal PMOS pass FET, which will support
up to 2Mpixel Camera modules (<65 mA). To support higher
resolution cameras, an external PNP is provided. The
external PNP configuration is offered to avoid excess on-chip
power dissipation at high loads and large differential between
BP and output settings. For lower current requirements, an
integrated PMOS pass FET is included. The input pin for the
integrated PMOS option is shared with the base current drive
pin for the PNP option.
The nominal output voltage of this regulator (VNOM as
referred in Table 4) is SPI configurable, and can be 2.5, 2.6,
2.75, or 3.0 V. The output current when working with the
internal pass FET is 65 mA, and could be up to 250 mA when
working with an external PNP.
MULTI-MEDIA CARD SUPPLY
This supply domain is generally intended for user
accessible multi-media cards such as Micro-SD
(TransFlash), RS-MMC, and the like. An external PNP is
utilized for this LDO to avoid excess on-chip power
dissipation at high loads and large differential between BP
and output settings. The external PNP device is always
connected to the BP line in the application. VSD may also be
applied to other system needs within the guidelines of the
regulator specifications. At the 1.8 V set point, the VSD
regulator can be powered from and external buck switcher
(2.2 V typ) for an efficiency advantage and reduced power
dissipation in the pass devices.
This regulator can be configured for nominal output
voltages (VNOM as referred in Table 4) of 1.8, 2.00, 2.60,
2.70, 2.8, 2.9, 3.00, and 3.15 V. All of these configurations
can draw a current of 250 mA.
USB SUPPLY
The VUSB regulator is used to supply a nominal output
voltage (VNOM as referred in Table 4) of 3.3 V to the external
USB PHY. The UVBUS line of the USB interface is supplied
by the host, in the case of host mode operation, or by the
integrated VBUS generation circuit, in the case of USB OTG
mode operation. The VBUS circuit is powered from the
SWBST boost supply, to ensure OTG current sourcing
compliance through the normal discharge range of the main
battery.
The VUSB regulator can be supplied from the VBUS wire
of the USB cable (power rail of the USB cable), when
supplied by a host, in the case of host mode operation, or by
the SWBST voltage for OTG mode operation. The SWBST
voltage supplies the VUSB regulator from the VINUSB pin,
which is internally connected to SWBST, and also to the
UVBUS pin to drive the VBUS on this mode (as long as
VBUSEN pin is logic high =1).
When UVBUS/CHARGRAW is detected in host mode, the
USB regulators, VUSB and VUSB2 should be automatically
enabled. It will be up to the processor to determine what type
of device is connected, either a USB host or a wall charger,
and take appropriate action.
The VUSB and VUSB2 regulators can be enabled
independent of OTG or Host Mode by setting the individual
SPI enable bits, VUSBEN and VUSB2EN respectively.
Since UVBUS can be shared with the charger input at the
board level, the UVBUS node must be able to withstand the
same high voltages as the charger. In over-voltage
conditions, the VUSB regulator is disabled. USB supplies
characteristics are shown in Tables 4 and 5.
Note: When VUSBIN =1, UVBUS will be connected via
internal switches to VINUSB and incur some current drain on
that pin, as much as 270
μA maximum, so care must be taken
to disable this path and set this SPI bit (VUSBIN) to 0 to
minimize current drain, even if SWBST and/or VUSB are
disabled.
VUSB REGULATOR
VUSB2 is implemented with an integrated PMOS pass
FET and has a dedicated supply pin VINUSB2. The pin
VINUSB2 should always be connected to BP, even in case
the regulators are not used by the application.
The nominal output voltage of this regulator (VNOM as
referred in Table 4) can be programmed to be 2.400, 2.600,
2.700, and 2.775 V with a load capability of 50 mA.
GEN1, GEN2 AND GEN3 REGULATORS
General purpose LDOs VGEN1, VGEN2, and VGEN3 are
provided for expansion of the power tree, to support
peripheral devices which could include WLAN, BT, GPS, or
other functional modules. All the regulators include
programmable set points for system flexibility. At the 1.2 V
and 1.5 V set points, both VGEN1 and VGEN2 can be
powered from an external buck switcher (2.2 V typ), for an
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