Analog Integrated Circuit Device Data
48
Freescale Semiconductor
13892
FUNCTIONAL DEVICE OPERATION
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: MC13892*VK and MC13892*VL in 139, 186 MAPBGA packages.
Main characteristics of SWBST are summarized in
PROTECTION FUNCTIONS
Current Limit
SWBST has an over-current limit protection of 1.5 A. A
portion of the output current is sensed across an internal
sense resistor which creates a drop that is then compared to
a fixed voltage. The output of the comparator is the flag of
over-current in the output driver of the boost converter. When
an over-current is detected, the PWM cycle is stopped by
turning off the internal NMOS, which allows the current in the
coil to decrease.
LDOS
The following is a description of the linear regulators. For
convenience these regulators are named to indicate their
typical or possible applications, but the supplies are not
limited to these uses, and may be applied to any loads within
the specified regulator capabilities.
A low power standby mode controlled by STANDBY is
provided in which the bias current is aggressively reduced.
This mode is useful for deep sleep operations, where certain
supplies cannot be disabled, but active regulation can be
tolerated with lesser parametric requirements. The output
drive capability and performance are limited in this mode.
Apart from the integrated linear regulators, there are also
GPO output pins provided to enable and disable discrete
regulators or functional blocks, or to use as general purpose
outputs for any system need. For example, one application
may be to enable a battery pack thermistor bias in
synchronization with timed ADC conversions.
All regulators use the main bandgap as the reference. The
main bandgap is bypassed with a capacitor at REFCORE.
The bandgap and the rest of the core circuitry is supplied
from VCORE. The performance of the regulators is directly
dependent on the performance of VCOREDIG and the
bandgap. No external DC loading is allowed on VCOREDIG
or REFCORE. VCOREDIG is kept powered as long as there
is a valid supply and/or coin cell. The following table captures
the main characteristics of the core circuitry.
Table 14. Core Circuitry Main Characteristics
REFERENCE
PARAMETER
TYPICAL
VCOREDIG (Digital core supply)
1.5 V
Output voltage in OFF mode
(41)1.2 V
Bypass Capacitor
2.2 F typ (0.65 F derated)
VCORE (Analog core supply)
2.775 V
Output voltage in OFF mode
(41)0 V
Bypass Capacitor
2.2 F typ (0.65 F derated)
REFCORE (Bandgap/Regulator Reference)
1.20 V
Bypass Capacitor
100 nF typ (65 nF derated)
Notes
40.
3.0 V < BP < 4.65 V, no external loading on VCOREDIG, VCORE, or REFCORE. Extended operation down to UVDET with VCORE
down to UVDET, but no system malfunction.
41.
The core is in On mode when charging, or when the state machine of the IC is not in the Off mode, nor in the power cut mode. Otherwise,
the core is in Off mode.
The transient load and line response are specified with the
waveforms as depicted in
Figure 9. Note that where the
transient load response refers to the overshoot only, so
excluding the DC shift itself, the transient line response refers
to the sum of both overshoot and DC shift. This is also valid
for the mode transition response.