Analog Integrated Circuit Device Data
Freescale Semiconductor
47
13892
FUNCTIONAL DEVICE OPERATION
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: MC13892*VK and MC13892*VL in 139, 186 MAPBGA packages.
skipping feature improves efficiency by reducing dynamic
switching losses simply by switching less often.
In its lowest power mode, the switcher can regulate using
hysteresis control known as a Pulse Frequency Modulation
(PFM) control scheme. The frequency spectrum will be a
function of input and output voltage, loading, and the external
components. Due to its spectral variance and lighter drive
capability, PFM mode is generally reserved for non-active
radio modes and Deep Sleep operation.
CURRENT LIMITER
There is no max current limit. Immediately after power up,
firmware should write the SWILIMB=1 SPI bit to allow max
load current (refer to Electrical Characteristics). Application
needs to provide current limit protection circuitry either in
battery or as pre regulated supply to BP.
SWITCHING FREQUENCY
A PLL generates the switcher system clocking from the
32.768 kHz crystal oscillator reference. To allow for spectral
optimization for reduction of spurious influence in a radio
environment, the PLL can be programmed via SPI from a
multiplication factor of 84 to 105, in steps of 3.
BOOST CONVERTERS
SWBST
SWBST is a boost switching regulator with a fixed 5.0 V
output. It runs at 2/3 of the switcher PLL frequency. SWBST
supplies the VUSB regulator for the USB system in OTG
mode, as well as the VBUS voltage at the UVBUS pin.
When SWBST is configured to supply the UVBUS pin in
OTG mode, the feedback will be switched to sense the
UVBUS pin instead of the SWBSTFB pin. Therefore, when
driving the VBUS for OTG mode, the output of the switcher
may rise to 5.75 V to compensate for the voltage drops in the
internal switches. Note that the parasitic leakage path for a
boost switcher will cause the output voltage SWBSTOUT and
SWBSTFB to sit at a Schottky drop below the battery voltage,
whenever SWBST is disabled. The switching NMOS
transistor is integrated on-chip. An external fly back Schottky
diode, inductor, and capacitor are required.
10uF
2.2uH
Output Drive
SWBSTIN
GNDSWBST
SWBSTOUT
Boosted Output
Voltage SWBST
SWBST
SWBSTOUT
BP
SWBSTFB
SPI
Registers
32KHz
Switcher
Core
Control
= Package Pin
4.7u
BP
Figure 8. 13892 SWBST Block Diagram.