PEB 20550
PEF 20550
Detailed Register Description
Semiconductor Group
151
01.96
4.6.21
Access in demultiplexed
μ
P-interface mode:
Access in multiplexed
μ
P-interface mode:
Reset value: xx
H
Synchronous Transfer Transmit Address Register B (SAXB)
read/write
read/write
address: 08
H
address: 10
H
The SAXB-register specifies for synchronous transfer channel B to which output
interface, port and time slot the serial data contained in the STDB-register is sent.
ISXB
Interface Select Transmit for channel B.
0…selects the PCM-interface as the output interface for synchronous
channel B.
1…selects the CFI-interface as the output interface for synchronous
channel B.
μ
P-Transfer Transmit Address for channel B; selects the port and time slot
number at the interface selected by ISXB according to
tables 16
and
17
:
MTXB6..0 = MA6..0.
MTXB6..0
4.6.22
Access in demultiplexed
μ
P-interface mode:
Access in multiplexed
μ
P-interface mode:
Reset value: 00xxxxxx
B
Synchronous Transfer Control Register (STCR)
read/write
read/write
address: 09
H
address: 12
H
The STCR-register bits are used to enable or disable the synchronous transfer utility and
to determine the sub time slot bandwidth and position if a PCM-interface time slot is
involved.
TAE, TBE
Transfer Channel A (B) Enable.
1… enables the
μ
P transfer of the corresponding channel.
0… disables the
μ
P transfer of the corresponding channel.
Channel Type A (B); these bits determine the bandwidth of the channel and
the position of the relevant bits in the time slot acoording to the table below.
CTA2..0
bit 7
ISXB
bit 0
MTXB0
MTXB6
MTXB5
MTXB4
MTXB3
MTXB2
MTXB1
bit 7
TBE
bit 0
CTA0
TAE
CTB2
CTB1
CTB0
CTA2
CTA1