PM7346 S/UNI-QJET
DATASHEET
PMC-960835
ISSUE 6
SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE
272
PS:
The PS bit selects the generated pattern. When PS is a logic 1, a repetitive
pattern is generated. When PS is a logic 0, a pseudo-random pattern is
generated.
The PS bit must be programmed to the desired setting before programming
any other PRGD registers, or the transmitted pattern may be corrupted. Any
time the setting of the PS bit is changed, the rest of the PRGD registers
should be reprogrammed.
TINV:
The TINV bit controls the logical inversion of the generated data stream.
When TINV is a logic 1, the data is inverted. When TINV is a logic 0, the data
is not inverted
RINV:
The RINV bit controls the logical inversion of the receive data stream before
processing. When RINV is a logic 1, the received data is inverted before
being processed by the pattern detector. When RINV is a logic 0, the
received data is not inverted
AUTOSYNC:
The AUTOSYNC bit enables the automatic resynchronization of the pattern
detector. The automatic resynchronization is activated when 6 or more bit
errors are detected in the last 64 bit periods. When AUTOSYNC is a logic 1,
the auto resync feature is enabled. When AUTO SYNC is a logic 0, the auto
sync feature is disabled, and pattern resynchronization is accomplished using
the MANSYNC bit.
MANSYNC:
The MANSYNC bit is used to initiate a manual resynchronization of the
pattern detector. A low to high transition on MANSYNC initiates the
resynchronization.