
PM7346 S/UNI-QJET
DATASHEET
PMC-960835
ISSUE 6
SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE
363
Figure 66
- Framer Mode G.751 E3 Transmit Input Stream With TGAPCLK
TGAPCLK[x]
TDATI[x]
bit 1536
bit 1531
bit 1529
bit 1530
bit 1532
bit 1533
bit 1534
bit 1535
bit14
TICLK[x]
bit13
The Framer Mode G.751 E3 Transmit Input Stream diagrams (Figure 65 and
Figure 66) show the expected format of the inputs TDATI, TFPI/TMFPI, and
TICLK and the output TFPO/TMFPO (and TGAPCLK) when the FRMRONLY bit
in the S/UNI-QJET Configuration 1 register is set, and the S/UNI-QJET is
configured for the E3 G.751 transmit format. TFPI or TMFPI pulses high for one
TICLK cycle and is aligned to the first bit of the frame alignment signal in the
G.751 E3 input data stream on TDATI. TFPO or TMFPO will pulse high for one
out of every 1536 TICLK cycles, providing upstream equipment with a reference
frame pulse. The alignment of TFPO or TMFPO is arbitrary. There is no set
relationship between TFPO/TMFPO and TFPI/TMFPI. The TGAPCLK output is
available in place of TFPO/TMFPO when the TXGAPEN bit in the S/UNI-QJET
Configuration 2 register is set to logic 1, as in Figure 66. TGAPCLK remains high
during the overhead bit positions. TDATI is sampled on the falling edge of
TGAPCLK.
Figure 67
- Framer Mode G.751 E3 Receive Output Stream
RDATO[x]
bit 1536
0
RFPO/RMFPO[x]
Nat
RAI
1
1
1
1
0
1
0
0
bit 1531
bit 1529
bit 1530
bit 1532
bit 1533
bit 1534
bit 1535
ROVRHD[x]
0
bit13
RSCLK[x]
Figure 68
RGAPCLK
- Framer Mode G.751 E3 Receive Output Stream with
RGAPCLK[x]
RDATO[x]
bit 1536
bit 1531
bit 1529
bit 1530
bit 1532
bit 1533
bit 1534
bit 1535
bit13
The Framer Mode G.751 E3 Receive Output Stream diagrams (Figure 67 and
Figure 68) show the format of the outputs RDATO, RFPO/RMFPO, RSCLK (and
RGAPCLK), and ROVRHD when the FRMRONLY and the 8KREFO bits in the