PM7346 S/UNI-QJET
DATASHEET
PMC-960835
ISSUE 6
SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE
322
In the receive direction, idle cells are dropped when the IDLEPASS bit in the
RXCP-50 Configuration 2 Register is set to a logic 0. No cells are passed when
the S/UNI-QJET is in the PLCP loss of frame defect state (for PLCP based
transmission), or when the S/UNI-QJET is in the out of cell delineation defect
state (for non-PLCP based transmission).
In the transmit direction, the HCSB bit in the TXCP-50 Configuration 1 Register
determines whether the HCS is calculated internally or is inserted directly from
Word 5. For the 52 byte structure, if the HCSB bit in the TXCP-50 is logic 1, then
no HCS byte is inserted and the TXCP-50 will only transmit the data present on
the 52 words. In such a configuration, the RXCP-50 should be configured to
pass the 52 word output without requiring cell delineation by setting the CCDIS
bit to logic 1. This setting is useful for passing arbitrary payload through the
transmit and receive Utopia interfaces.
12.9 Resetting the RXFF and TXFF FIFOs
Resetting the receive and transmit FIFOs can be accomplished using the
FIFORST bits (RXCP-50 FIFO/UTOPIA Control & Config, TXCP-50 Configuration
1 registers). When resetting, the FIFORST bit should be written with a logic 1,
and held for two or more clock cycles (the longer of two Utopia clock cycles or 16
line clock cycles). After de-asserting FIFORST, data can be safely written to the
TXFF after two or more clock cycles have passed.
12.10 Servicing Interrupts
The S/UNI-QJET will assert INTB to logic 0 when a condition which is configured
to produce an interrupt occurs. To find which condition caused this interrupt to
occur, the procedure outlined below should be followed:
1. Read the INT[4:1] bits of the S/UNI-QJET Clock Activity Monitor and Interrupt
Identification register (007H) to identify which quadrant of the S/UNI-QJET
produced the interrupt. For example, a logic one on the INT[3] register bit
indicates that quadrant number 3 of the S/UNI-QJET produced the interrupt.
2. Having identified the quadrant which produced the interrupt, read the
S/UNI-QJET Interrupt Status Register (005H, 105H, 205H, and 305H) to
identify which block in the quadrant produced the interrupt. For example, a
logic one on the TDPRI register bit in register 205H indicates that the TDPR
block in quadrant number 3 of the S/UNI-QJET produced the interrupt.
3. Service the interrupt.