APPENDIX A LIST OF I/O REGISTERS
S1C17651 TECHNICAL MANUAL
Seiko Epson Corporation
AP-A-1
Appendix A List of I/O Registers
Internal peripheral circuit area 1 (0x4000–0x43ff)
Peripheral
Address
Register name
Function
MISC register
(8-bit device)
0x4020
MISC_
DMODE1
Debug Mode Control Register 1
Enables peripheral operations in debug mode
(PCLK).
UART
(with IrDA)
Ch.0
(8-bit device)
0x4100
UART_ST0
UART Ch.0 Status Register
Indicates transfer, buffer and error statuses.
0x4101
UART_TXD0
UART Ch.0 Transmit Data Register
Transmit data
0x4102
UART_RXD0
UART Ch.0 Receive Data Register
Receive data
0x4103
UART_MOD0
UART Ch.0 Mode Register
Sets transfer data format.
0x4104
UART_CTL0
UART Ch.0 Control Register
Controls data transfer.
0x4105
UART_EXP0
UART Ch.0 Expansion Register
Sets IrDA mode.
0x4106
UART_BR0
UART Ch.0 Baud Rate Register
Sets baud rate.
0x4107
UART_FMD0
UART Ch.0 Fine Mode Register
Sets fine mode.
8-bit timer
Ch. 0
(16-bit device)
0x4240
T8_CLK0
T8 Ch.0 Count Clock Select Register
Selects a count clock.
0x4242
T8_TR0
T8 Ch.0 Reload Data Register
Sets reload data.
0x4244
T8_TC0
T8 Ch.0 Counter Data Register
Counter data
0x4246
T8_CTL0
T8 Ch.0 Control Register
Sets the timer mode and starts/stops the timer.
0x4248
T8_INT0
T8 Ch.0 Interrupt Control Register
Controls the interrupt.
Interrupt
controller
(16-bit device)
0x4306
ITC_LV0
Interrupt Level Setup Register 0
Sets the P0 interrupt level.
0x4308
ITC_LV1
Interrupt Level Setup Register 1
Sets the CT interrupt level.
0x430a
ITC_LV2
Interrupt Level Setup Register 2
Sets the RTC interrupt level.
0x430c
ITC_LV3
Interrupt Level Setup Register 3
Sets the LCD and T16A2 Ch.0 interrupt levels.
0x4310
ITC_LV5
Interrupt Level Setup Register 5
Sets the T8 Ch.0 interrupt level.
0x4312
ITC_LV6
Interrupt Level Setup Register 6
Sets the UART Ch.0 interrupt level.
0x4314
ITC_LV7
Interrupt Level Setup Register 7
Sets the SPI Ch.0 interrupt level.
SPI Ch.0
(16-bit device)
0x4320
SPI_ST0
SPI Ch.0 Status Register
Indicates transfer and buffer statuses.
0x4322
SPI_TXD0
SPI Ch.0 Transmit Data Register
Transmit data
0x4324
SPI_RXD0
SPI Ch.0 Receive Data Register
Receive data
0x4326
SPI_CTL0
SPI Ch.0 Control Register
Sets the SPI mode and enables data transfer.
Internal Peripheral Circuit Area 2 (0x5000–0x5fff)
Peripheral
Address
Register name
Function
Clock timer
(8-bit device)
0x5000
CT_CTL
Clock Timer Control Register
Resets and starts/stops the timer.
0x5001
CT_CNT
Clock Timer Counter Register
Counter data
0x5002
CT_IMSK
Clock Timer Interrupt Mask Register
Enables/disables interrupt.
0x5003
CT_IFLG
Clock Timer Interrupt Flag Register
Indicates/resets interrupt occurrence status.
Watchdog timer
(8-bit device)
0x5040
WDT_CTL
Watchdog Timer Control Register
Resets and starts/stops the timer.
0x5041
WDT_ST
Watchdog Timer Status Register
Sets the timer mode and indicates NMI status.
Clock generator
/Theoretical
regulation
(8-bit device)
(T16A2, UART,
SND, LCD, TR)
0x5060
CLG_SRC
Clock Source Select Register
Selects the clock source.
0x5061
CLG_CTL
Oscillation Control Register
Controls oscillation.
0x5064
CLG_FOUTA
FOUTA Control Register
Controls FOUTA clock output.
0x5065
CLG_FOUTB
FOUTB Control Register
Controls FOUTB clock output.
0x5068
T16A_CLK0
T16A2 Clock Control Register Ch.0
Controls the T16A2 Ch.0 clock.
0x506c
UART_CLK0
UART Ch.0 Clock Control Register
Selects the baud rate generator clock.
0x506e
SND_CLK
SND Clock Control Register
Controls the SND clock.
0x5070
LCD_TCLK
LCD Timing Clock Control Register
Controls the LCD clock.
0x5071
LCD_BCLK
LCD Booster Clock Control Register
Controls the LCD booster clock.
0x5078
TR_CTL
TR Control Register
Controls theoretical regulation.
0x5079
TR_VAL
TR Value Register
Sets a regulation value.
0x507d
CLG_WAIT
Oscillation Stabilization Wait Control Register
Controls oscillation stabilization waiting time.
0x5080
CLG_PCLK
PCLK Control Register
Controls the PCLK supply.
0x5081
CLG_CCLK
CCLK Control Register
Configures the CCLK division ratio.
LCD driver
(8-bit device)
0x5063
LCD_TCLK
LCD Clock Select Register
Selects the LCD clock.
0x50a0
LCD_DCTL
LCD Display Control Register
Controls the LCD display.
0x50a2
LCD_CCTL
LCD Clock Control Register
Controls the LCD drive duty.
0x50a3
LCD_VREG
LCD Voltage Regulator Control Register
Controls the LCD drive voltage regulator.
0x50a5
LCD_IMSK
LCD Interrupt Mask Register
Enables/disables interrupts.
0x50a6
LCD_IFLG
LCD Interrupt Flag Register
Indicates/resets interrupt occurrence status.
SVD circuit
(8-bit device)
0x5100
SVD_EN
SVD Enable Register
Enables/disables the SVD operation.
0x5101
SVD_CMP
SVD Comparison Voltage Register
Sets the comparison voltage.
0x5102
SVD_RSLT
SVD Detection Result Register
Voltage detection results
Power generator
(8-bit device)
0x5120
VD1_CTL
VD1 Control Register
Controls the VD1 regulator heavy load protec-
tion mode.
Sound
generator
(8-bit device)
0x5180
SND_CTL
SND Control Register
Controls buzzer outputs.
0x5181
SND_BZFQ
Buzzer Frequency Control Register
Sets the buzzer frequency.
0x5182
SND_BZDT
Buzzer Duty Ratio Control Register
Sets the buzzer signal duty ratio.