参数资料
型号: S29JL032J70TFI213
厂商: SPANSION LLC
元件分类: PROM
英文描述: 2M X 16 FLASH 3V PROM, 70 ns, PDSO48
封装: LEAD FREE, MO-142(D)DD, TSOP-48
文件页数: 7/63页
文件大小: 1618K
代理商: S29JL032J70TFI213
August 24, 2011 S29JL032J_00_05
S29JL032J
15
Data
Sheet
8.2
Requirements for Reading Array Data
To read array data from the outputs, the system must drive the CE# and OE# pins to VIL. CE# is the power
control and selects the device. OE# is the output control and gates array data to the output pins. WE# should
remain at VIH. The BYTE# pin determines whether the device outputs array data in words or bytes.
The internal state machine is set for reading array data upon device power-up, or after a hardware reset. This
ensures that no spurious alteration of the memory content occurs during the power transition. No command is
necessary in this mode to obtain array data. Standard microprocessor read cycles that assert valid addresses
on the device address inputs produce valid data on the device data outputs. Each bank remains enabled for
read access until the command register contents are altered.
Refer to the Read-Only Operations on page 48 for timing specifications and to Figure 17.1 on page 48 for the
timing diagram. ICC1 in DC Characteristics on page 45 represents the active current specification for reading
array data.
8.3
Writing Commands/Command Sequences
To write a command or command sequence (which includes programming data to the device and erasing
sectors of memory), the system must drive WE# and CE# to VIL, and OE# to VIH.
For program operations, the BYTE# pin determines whether the device accepts program data in bytes or
words. Refer to Word/Byte Configuration on page 14 for more information.
The device features an Unlock Bypass mode to facilitate faster programming. Once a bank enters the
Unlock Bypass mode, only two write cycles are required to program a word or byte, instead of four. Byte/
Word Program Command Sequence on page 33 has details on programming data to the device using both
standard and Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sectors, or the entire device. Table 8.3 on page 18 and
Table 8.4 on page 20 indicate the address space that each sector occupies. Similarly, a “sector address” is
the address bits required to uniquely select a sector. Command Definitions on page 32 has details on erasing
a sector or the entire chip, or suspending/resuming the erase operation.
The device address space is divided into four banks. A “bank address” is the address bits required to uniquely
select a bank.
ICC2 in the DC Characteristics table represents the active current specification for the write mode. AC
Characteristics on page 48 contains timing specification tables and timing diagrams for write operations.
8.3.1
Accelerated Program Operation
The device offers accelerated program operations through the ACC function. This is one of two functions
provided by the WP#/ACC pin. This function is primarily intended to allow faster manufacturing throughput at
the factory.
If the system asserts VHH on this pin, the device automatically enters the aforementioned Unlock Bypass
mode, temporarily unprotects any protected sectors, and uses the higher voltage on the pin to reduce the
time required for program operations. The system would use a two-cycle program command sequence as
required by the Unlock Bypass mode. Removing VHH from the WP#/ACC pin returns the device to normal
operation. Note that VHH must not be asserted on WP#/ACC for operations other than accelerated
programming, or device damage may result. In addition, the WP#/ACC pin must not be left floating or
unconnected; inconsistent behavior of the device may result. See Write Protect (WP#) on page 25 for related
information.
8.3.2
Autoselect Functions
If the system writes the autoselect command sequence, the device enters the autoselect mode. The system
can then read autoselect codes from the internal register (which is separate from the memory array) on
DQ15–DQ0. Standard read cycle timings apply in this mode. Refer to Autoselect Mode on page 22 and
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