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| 型号： | SSTUP32866EC/S |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 锁存器 |
| 英文描述： | 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96 |
| 封装： | 13.50 X 5.50 MM, 1.05 MM HEIGHT, LEAD FREE, PLASTIC, SOT-536-1, LFBGA-96 |
| 文件页数： | 15/31页 |
| 文件大小： | 538K |
| 代理商： | SSTUP32866EC/S |
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SSTUP32866_2
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 02 — 14 September 2006
22 of 31
Philips Semiconductors
SSTUP32866
1.8 V DDR2-667/800 programmable registered buffer with parity
11.3 Error output load circuit and voltage measurement information
VDD = 1.8 V ± 0.1 V.
All input pulses are supplied by generators having the following characteristics:
PRR
≤ 10 MHz; Z
0 =50 ; input slew rate = 1 V/ns ± 20 %, unless otherwise specied.
(1) CL includes probe and jig capacitance.
Fig 20. Load circuit, error output measurements
Fig 21. Voltage waveforms, open-drain output LOW-to-HIGH transition time with respect to
RESET input
Fig 22. Voltage waveforms, open-drain output HIGH-to-LOW transition time with respect
to clock inputs
CL = 10 pF(1)
VDD
OUT
DUT
test point
RL = 1 k
002aaa500
0.5VDD
tPLH
VDD
0 V
0.15 V
VOH
0 V
output
waveform 2
RESET
002aaa501
LVCMOS
VICR
tHL
0.5VDD
VDD
VOL
timing
inputs
output
waveform 1
Vi(p-p)
VICR
002aaa502
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