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参数资料
| 型号： | SSTUP32866EC/S |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 锁存器 |
| 英文描述： | 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96 |
| 封装： | 13.50 X 5.50 MM, 1.05 MM HEIGHT, LEAD FREE, PLASTIC, SOT-536-1, LFBGA-96 |
| 文件页数： | 22/31页 |
| 文件大小： | 538K |
| 代理商： | SSTUP32866EC/S |
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SSTUP32866_2
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 02 — 14 September 2006
29 of 31
Philips Semiconductors
SSTUP32866
1.8 V DDR2-667/800 programmable registered buffer with parity
15. Revision history
Table 18.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
SSTUP32866_2
20060914
Product data sheet
-
SSTUP32866_1
Modications:
Table 1 “Ordering information”: added Type number SSTUP32866EC/S
Figure 3 “Pin conguration for LFBGA96” modied (added Type number SSTUP32866EC/S)
Table 5 “Parity and standby function table”: added reference to Table note 4 at column heading
“QERR”
SSTUP32866EC/G and SSTUP32866EC/S
Table 10 “Timing requirements”, description below table title: changed “See Figure 2.” to
“See Section 11.1.”
– changed parameter description of tPDM from “propagation delay, single bit switching” to “peak
propagation delay” (moved “single bit switching” to Conditions column)
– changed parameter description of tPDMSS from “propagation delay, simultaneous switching” to
“simultaneous switching peak propagation delay”
SSTUP32866_1
20060406
Product data sheet
-
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