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参数资料
| 型号： | SSTUP32866EC/S |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 锁存器 |
| 英文描述： | 32866 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PBGA96 |
| 封装： | 13.50 X 5.50 MM, 1.05 MM HEIGHT, LEAD FREE, PLASTIC, SOT-536-1, LFBGA-96 |
| 文件页数： | 4/31页 |
| 文件大小： | 538K |
| 代理商： | SSTUP32866EC/S |
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SSTUP32866_2
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 02 — 14 September 2006
12 of 31
Philips Semiconductors
SSTUP32866
1.8 V DDR2-667/800 programmable registered buffer with parity
9.
Recommended operating conditions
[1]
The RESET and Cn inputs of the device must be held at valid levels (not oating) to ensure proper device operation.
[2]
The differential inputs must not be oating, unless RESET is LOW.
Table 8.
Recommended operating conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDD
supply voltage
1.7
-
2.0
V
Vref
reference voltage
0.49
× V
DD
0.50
× V
DD
0.51
× V
DD
V
VT
termination voltage
Vref 0.040
Vref
Vref + 0.040
V
VI
input voltage
0
-
VDD
V
VIH(AC)
AC HIGH-level input voltage
data (Dn), CSR, and
PAR_IN inputs
Vref + 0.250
-
V
VIL(AC)
AC LOW-level input voltage
data (Dn), CSR, and
PAR_IN inputs
--
Vref 0.250
V
VIH(DC)
DC HIGH-level input voltage
data (Dn), CSR, and
PAR_IN inputs
Vref + 0.125
-
V
VIL(DC)
DC LOW-level input voltage
data (Dn), CSR, and
PAR_IN inputs
--
Vref 0.125
V
VIH
HIGH-level input voltage
RESET, Cn, SELAB,
SELDR
[1] 0.65
× VDD
--
V
VIL
LOW-level input voltage
RESET, Cn, SELAB,
SELDR
[1] -
-
0.35
× VDD
V
VICR
common mode input voltage
range
CK, CK
[2] 0.675
-
1.125
V
VID
differential input voltage
CK, CK
[2] 600
-
mV
IOH
HIGH-level output current
SELDR either HIGH or
LOW
--
8mA
IOL
LOW-level output current
SELDR either HIGH or
LOW
--
8
mA
Tamb
ambient temperature
operating in free air
SSTUP32866EC/G
0
-
70
°C
SSTUP32866EC/S
0
-
85
°C
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