参数资料
型号: ST40RA200XH6E
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 200 MHz, RISC PROCESSOR, PBGA372
封装: 27 X 27 MM, 2.33 MM HEIGHT, PLASTIC, BGA-372
文件页数: 17/94页
文件大小: 2144K
代理商: ST40RA200XH6E
24/92
ST40RA
5 System configuration
ST’s own tools include:
C/C++ compilers,
debugger,
proprietary OS.
Third parties include:
Microsoft: WindowsCE,
Sun: JavaOS for consumers,
WindRiver: VxWorks, Tornado tools,
Linux,
Insignia JVM,
ANT browser.
4.5.2
Software compatibility
SH-4 core software
The ST40RA SH-4 core is binary code compatible with the Hitachi SH775x family.
Standard peripheral driver
The ST40 standard SCIF, timer, real-time clock and PIO are compatible with the ST40 SOC range of
devices and the Hitachi SH775x family.
Bus interface driver
The PCI, LMI, and EMI interfaces are register compatible with the ST40 SOC range of devices.
The ST40RA contains an EMPI and MPX arbiter and MPX clock control unit which are additional to
the bus interface components of the ST40 SOC range of devices.
I/O device driver
The Mailbox is a module with no ST legacy software.
5
System configuration
The ST40RA system address map has been designed to maintain compatibility with existing ST40
family devices and other STMicroelectronics devices.
The SH-4 core and core peripherals maintain compatibility with the ST40 SOC range of devices and
Hitachi SH7750 wherever possible.
Devices listed in Table 5: ST40RA system address map on page 26, are documented in the ST40
System Architecture Manual as described in Chapter 2: ST40 documentation suite on page 19.
Coherency between the cache and external memory is assured by software. The ST40 CPU has
cache control instructions which enable software to do this. Details of these instructions are given in
the ST40 CPU Core Architecture Manual.
The ST40RA is run in little endian mode.
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