参数资料
型号: ST52510F3M6
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: MICROCONTROLLER, PDSO20
封装: SOP-20
文件页数: 28/136页
文件大小: 3335K
代理商: ST52510F3M6
Obsolete
Product(s)
- Obsolete
Product(s)
16.13 I2C Interface Characteristics
Subject to general operating conditions for VDD,
fosc, and TA, unless otherwise specified.
Refer to I/O port characteristics for more details on
the input/output alternate function characteristics
(SDA and SCL). The I2C interface meets the
requirements of the Standard I2C communication
protocol described in the following table.
Figure 16.13 I2C Bus and Timing Diagram 4)
Notes:
1. Data based on standard I2C protocol requirements, not tested in production.
2. The device must internally provide a hold time of at least 300ns for the SDA signal in order to bridge the
undefined region of the falling edge of SCL.
3. The maximum hold time of the START condition has only to be met if the interface does not stretch the
low period of the SCL signal.
4. Measurement points are done at levels: 0.3xVDD and 0.7xVDD.
Table 16.17 I2C Interface Characteristics
Symbol
Parameter
Standard mode I2C
Fast mode I2C
Unit
Min 1)
Max 1)
Min 1)
Max 1)
tw(SCLL)
SCL clock low time
4.7
1.3
μs
tw(SCLH)
SCL clock high time
4.0
0.6
tsu(SDA)
SDA setup time
250
100
ns
th(SDA)
SDA data hold time
0 3)
0 2)
900 3)
tr(SDA)
tr(SCL)
SDA and SCL rise time
1000
20+0.1Cb
300
tf(SDA)
tf(SCL)
SDA and SCL fall time
300
20+0.1Cb
300
th(STA)
START condition hold time
4.0
0.6
μs
tsu(STA)
Repeated START condition setup time
4.7
0.6
tsu(STO)
STOP condition setup time
4.0
0.6
ns
tw(STO:STA)
STOP to START condition time (bus free)
4.7
1.3
ms
Cb
Capacitive load for each bus line
400
pF
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