参数资料
型号: T9000
厂商: Lineage Power
英文描述: ISDN Network Termination Node (NTN) Device(ISDN网络终端节点器件)
中文描述: ISDN网络终端节点(新界西)设备(ISDN网网络终端节点器件)
文件页数: 18/126页
文件大小: 1523K
代理商: T9000
18
Lucent Technologies Inc.
Advance Data Sheet
April 2000
ISDN Network Termination Node (NTN) Device
T9000
6 Functional Modules
(continued)
6.5 Interrupts
(continued)
External pins XINT0 and XINT1 are also collapsed in the UCI module. XINT0 is collapsed into register GIR0 in bit
XI0I. XINT1 is collapsed into register GIR1 in bit XI1I. These interrupts are maskable via the corresponding inter-
rupt enable bits (see register GIE).
5-6710F.a
Figure 3. NTN Data Memory Address Space
6.6 Interrupt Register Set
Table 12. GIR0: Global Interrupt Register 0 (0x00)
Note:
All bits in this register are set to 1 upon occurrence of the corresponding interrupt condition, and remain set
until the interrupt condition causing the interrupt goes away.
Reg
GIR0
RESET
R/W
R
Default
Bit 7
Bit 6
Bit 5
Bit 4
XI0I
0
Bit 3
125I
0
Bit 2
UII
0
Bit 1
SII
0
Bit 0
GPIOI
0
Bit
7—5
Symbol
Name/Description
Reserved.
4
XI0I
External
XINT0
Interrupt.
This interrupt follows the level on the NTN external interrupt pin
XINT0.
125
μ
s Interrupt.
This interrupt occurs every 125
μ
s. This can be used to program the timing
of the microcontroller to access the B-channel data.
U-Interface Interrupt.
This interrupt occurs when any of the interrupt bits in the U interrupt
register (UIR) are active, i.e., all of the U-interface interrupts are collapsed into this bit.
S-Interface Interrupt.
This interrupt occurs when any of the interrupt bits in the S interrupt
register (SIR) are active, i.e., all of the S-interface interrupts are collapsed into this bit.
GPIO Interrupt.
This interrupt occurs when any of the interrupt bits in the GPIO interrupt
register (GPIR) are active, i.e., all of the GPIO interrupts are collapsed into this bit.
3
125I
2
UII
1
SII
0
GPIOI
ACCESSIBLE
BY INDIRECT
ADDRESSING
ONLY
ACCESSIBLE
BY DIRECT
ADDRESSING
ONLY
ACCESSIBLE
BY DIRECT
AND
INDIRECT
ADDRESSING
SPECIAL
FUNCTION
REGISTERS
80C32
INTERNAL RAM
FFh
80h
PORTS,
STATUS AND CONTROL BITS,
TIMER, REGISTERS,
STACK POINTER, ACCUMULATOR
FFh
80h
UPPER
128
7Fh
LOWER
128
0
NTN ON-CHIP RAM
(80C32 EXTERNAL SPACE)
0FFFh
(4K)
NTN OFF-CHIP RAM
(80C32 EXTERNAL SPACE)
UP TO 60K
ACCESSIBLE
EXTERNAL
MEMORY
NTN
ON-CHIP
SRAM
NTN
DEVICE
REGISTERS
LOWEST 4K
NOT
ACCESSIBLE
EXTERNAL
QUALIFIER
RDi
WRi
5Dh
0FFFh
(4K)
RD
WR
FFFFh
(64K)
0
0
ON-CHIP
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