Lucent Technologies Inc.
29
Advance Data Sheet
April 2000
ISDN Network Termination Node (NTN) Device
T9000
7 Transmission Superblock
The transmission superblock (TSB) contains all the
modules that are directly involved in the transmission
of data to/from the S, U, HDLC, or GCI+ interfaces. It is
comprised of the following modules (contained in a box
labeled Transmission Superblock in Figure 1).
I
U block—This module provides the NT-mode and
LT-mode U-interface function.
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S block—This module provides the NT-mode
S/T-interface function.
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Data Flow/Activation Control (DFAC)—This module
manages the data flow between the U, S, HDLC, and
GCI+ interfaces. In addition, it serves as the central
control element for activation/deactivation of the
S and U blocks, and implements the embedded
operation channel (EOC) processing state machine.
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HDLC—This module provides the HDLC controller
function for D-channel access.
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GCI+—This module provides the GCI+ interface for
external components such as codecs.
7.1 U-Interface Block (U Block)
The ISDN U-interface block offers the following
features:
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Conforms to ETSI TS 080 and
ANSI
T1.601 stan-
dards in both LT and NT operation.
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Meets loop range requirement per the
British Tele-
com
*
specification BT RC7355D.
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Single pulse and ILOSS output modes for test sup-
port.
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Manual/auto activation, manual/auto dying gasp
(power status indication), and manual/auto activation
of the EOC control.
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M4 control and status bits incorporate 3x (trinal) bit
filtering.
The primary interface to this block is provided via the
DFAC module (see Section 7.3, Data Flow/Activation
Control Module (DFAC)). A bank of registers contained
in the DFAC module defines the operation of the U-
interface.
* British Telecom is a trademark of British Telecommunications plc.
7.2 S/T-Interface Block (S Block)
The ISDN S/T-interface block offers the following fea-
tures:
I
Conforms to ITU-T I.430, ETSI 300-012, and
ANSI
T1.605 standards for the network termination (NT)
side of the network.
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Fixed/adaptive timing modes under microcontrol, or
pin control, defaulting to adaptive timing from a reset
state.
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Provides knowledge of the S/T-interface activation
state to the microcontroller by supplying INFO-1 and
INFO-3 state information.
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Manual/auto activation, multiframing (S and Q chan-
nels), and POTS D-channel contention resolution.
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Microcontrolled powerdown feature supports a scan
mode that looks for activity on the S/T-interface.
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Supports point-to-point and multipoint arrangement.
Data to/from this block is provided by/to the DFAC. A
bank of registers contained in the DFAC module
defines the operation of the S/T-interface.