
TMS320C6474
Multicore Digital Signal Processor
www.ti.com
SPRS552 – OCTOBER 2008
Controller (PSC) for the TMS320C6474 digital signal processors (DSPs).
TMS320C6474 DSP Enhanced DMA (EDMA3) Controller User's Guide. This document
describes the Enhanced DMA (EDMA3) Controller on the TMS320C6474 digital signal
processors (DSPs).
TMS320C6474 DSP Antenna Interface User's Guide. This document describes the
Antenna Interface module on the TMS320C6474 digital signal processors (DSPs).
TMS320C6474 DSP Frame Synchronization User's Guide. This document describes the
reference guide for Frame Synchronization module on the TMS320C6474 digital signal
processors (DSPs).
TMS320C6474 DSP Semaphore User's Guide. This document describes the usage of the
semaphore and some of the CSL calls used to configure/use the Semaphore module on the
TMS320C6474 digital signal processors (DSPs).
TMS320C6474 DSP General-Purpose Input/Output (GPIO) User's Guide. This document
describes the general-purpose input/output (GPIO) peripheral in the digital signal processors
(DSPs) of the TMS320C6474 DSP family.
TMS320C6474 DSP Multichannel Buffered Serial Port (McBSP) Reference Guide. This
document describes the operation of the multichannel buffered serial port (McBSP) in the
digital signal processors (DSPs) of the TMS320C6474 device.
TMS320C6474 DSP 64-Bit Timer User’s Guide. This document provides an overview of the
64-bit timer in the TMS320C6474 digital signal processors (DSPs).
TMS320C6474 DSP DDR2 Memory Controller User's Guide. This document describes the
DDR2 memory controller in the TMS320C6474 digital signal processors (DSPs).
TMS320C6474 DSP Viterbi-Decoder Coprocessor 2 (VCP2) Reference Guide. This
document describes the operation and programming of the VCP2 in the TMS320C6474
digital signal processors (DSPs).
TMS320C6474 DSP Turbo-Decoder Coprocessor 2 (TCP2) Reference Guide. This
document describes the operation and programming of the TCP2 in the TMS320C6474
digital signal processors (DSPs).
TMS320C6474 DSP Inter-Integrated Circuit (I2C) Module User's Guide. This document
describes the inter-integrated circuit (I2C) module in the TMS320C6474 digital signal
processors (DSPs).
TMS320C6474 DSP Serial RapidIO (SRIO) User's Guide. This document describes the
Serial RapidIO (SRIO) on the TMS320C6474 digital signal processors (DSPs).
TMS320C6474 DSP Bootloader User's Guide. This document describes the features of the
on-chip Bootloader provided with the TMS320C6474 digital signal processors (DSPs).
TMS320C6474 DSP Chip Interrupt Controller (CIC) User's Guide. This document
describes the system event routing using the chip interrupt controller (CIC) for the
TMS320C6474 digital signal processors (DSPs).
TMS320C6474
Module
Throughput.
This
document
provides
information
on
the
TMS320C6474 module throughput.
TMS320C6474 Hardware Design Guide. This document describes hardware system design
considerations for the TMS320C6474 DSP.
TMS320C6474 DDR2 Implementation Guidelines. This document provides implementation
instructions for the DDR2 interface contained on the TMS320C6474 DSP.
TMS320C6474
SERDES
Implementation
Guidelines.
This
document
contains
Device Overview
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