参数资料
型号: TRC105
厂商: RFM
文件页数: 10/67页
文件大小: 0K
描述: IC TXRX 300MHZ-510MHZ 32TQFN
标准包装: 1
频率: 300MHz ~ 510MHz
数据传输率 - 最大: 200kbps
调制或协议: FSK,OOK
应用: 通用
功率 - 输出: 13dBm
灵敏度: -112dBm
电源电压: 2.1 V ~ 3.6 V
电流 - 接收: 3mA
电流 - 传输: 30mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
工作温度: -40°C ~ 85°C
封装/外壳: 32-TQFN
包装: 标准包装
产品目录页面: 583 (CN2011-ZH PDF)
其它名称: 583-1159-6
2.5 Frequency Synthesizer
The TRC105 VCO operating frequency range is covered in six bands. Operation in each band requires a specific
VCO inductor value and configuration parameter setting, as shown in Table 4 below:
MCFG00_Band[4..2]
000
001
010
011
100
101
110 to 111
Frequency Band MHz
300-330
330-365
365-400
400-440
440-470
470-510
not used
Table 4
Each of these bands is divided into four subbands to provide a low phase noise VCO frequency trimming mecha-
nism. Subbands are selected as shown in Table 5 below:
3 quarter
MCFG00_Subband[1..0]
00
01
10
11
Subband
1 st quarter
2 nd quarter
rd
4 th quarter
400-440 MHz example
400-410
410-420
420-430
430-440
Table 5
Using the VCO as discussed above, the frequency synthesizer generates the local oscillator (LO) signal for the
receiver and transmitter sections. The core of the synthesizer is implemented with an integer-N PLL architecture.
The frequency is set by three divider parameters R, P and S. R is the frequency divider ratio in the reference fre-
quency path. P and S set the frequency divider ratio in the feedback loop of the PLL. The frequency synthesizer
includes a crystal oscillator which provides the frequency reference for the PLL. The equations giving the relation-
ships between the reference crystal frequency, the local oscillator frequency and RF carrier frequency are given
below:
F LO = F XTAL *(75*(P + 1) + S)/(R + 1), with P and S in the range 0 to 255, S less than (P + 1), R in the
range 64 to 169, and F LO and F XTAL in MHz.
F RF = 1.125*F LO , where F RF and F LO are in MHz
F LO is the first local oscillator (VCO) frequency, F XTAL is the reference crystal frequency and F RF is the RF channel
frequency. F LO is the frequency used for the first down-conversion of the receiver and the second up-conversion of
the transmitter. The intermediate frequency used for the second down-conversion of the receiver and the first up-
conversion of the transmitter is equal to 1/8 of F LO . As an example, with a crystal frequency of 12.8 MHz and an
RF frequency of 434 MHz, F LO is 385.8 MHz and the first IF of the receiver is 48.2 MHz.
There are two sets of divider ratio registers: SynthR1[7..0] , SynthP1[7..0] , SynthS1[7..0] , and SynthR2[7..0] ,
SynthP2[7..0] , SynthS2[7..0] . The MCFG05_RF_Freq[0] bit is used to select which set of registers to use as the
current frequency setting. For frequency hopping applications, this reduces the programming and synthesizer set-
tling time when changing frequencies. While the data is being transmitted, the next frequency is programmed and
ready. When the current transaction is complete, the MCFG05_RF_Freq[0] bit is complemented and the frequen-
cy shifts to the next freq according to the contents of the divider ratio registers. This process is repeated for each
frequency hop.
www.RFM.com E-mail: info@rfm.com
? 2009-2013 by RF Monolithics, Inc.
Technical support +1.800.704.6079
Page 10 of 67
TRC105 - 05/29/13
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