参数资料
型号: WJLXT972ALC.A4
厂商: INTEL CORP
元件分类: 网络接口
英文描述: DATACOM, ETHERNET TRANSCEIVER, PQFP64
封装: ROHS COMPLIANT, LQFP-64
文件页数: 66/97页
文件大小: 1281K
代理商: WJLXT972ALC.A4
Intel
LXT972A Single-Port 10/100 Mbps PHY Transceiver
Datasheet
69
Document Number: 249186-004
Revision Date: 25-Oct-2005
Figure 24 does not show the TX_ER signal.
.
Figure 24. Intel LXT972A Transceiver 100BASE-TX Transmit Timing
t1
t2
t5
t3
t4
0ns
250ns
TXCLK
TX_EN
TXD[3:0]
TPO
CRS
B3454-03
Note: Timing diagram depicts 4B mode.
Table 31. Intel LXT972A Transceiver 100BASE-TX Transmit Timing Parameters
Parameter
Symbol
Min
Typ
1
Max
Units2
Test Conditions
TXD[3:0], TX_EN, TX_ER setup to
TX_CLK High
t1
12
ns
TXD[3:0], TX_EN hold from TX_CLK
High
t2
0
ns
TX_EN sampled to CRS asserted
t3
20
24
BT
TX_EN sampled to CRS de-asserted
t4
24
28
BT
TX_EN sampled to TPO out (Tx
latency)
t5
5.3
5.7
BT
1. Typical values are at 25 °C and are for design aid only, not guaranteed, and not subject to production
testing.
2. BT (Bit Time) is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit
rate. 100BASE-T bit time = 10-8 s or 10 ns.
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