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| 型号： | WJLXT972ALC.A4 |
| 厂商： | INTEL CORP |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| 封装： | ROHS COMPLIANT, LQFP-64 |
| 文件页数： | 81/97页 |
| 文件大小： | 1281K |
| 代理商： | WJLXT972ALC.A4 |
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Intel
LXT972A Single-Port 10/100 Mbps PHY Transceiver
82
Datasheet
Document Number: 249186-004
Revision Date: 25-Oct-2005
Table 45 lists auto-negotiation advertisement bits.
Table 45. Auto-Negotiation Advertisement Register - Address 4, Hex 4
Bit
Name
Description
Type 1
Default
4.15
Next Page
0 = Port has no ability to send multiple pages.
1 = Port has ability to send multiple pages.
R/W
0
4.14
Reserved
Ignore when read.
RO
0
4.13
Remote Fault
0 = No remote fault.
1 = Remote fault.
R/W
0
4.12
Reserved
Write as ‘0’. Ignore on Read.
R/W
0
4.11
Asymmetric
Pause
Pause operation defined in IEEE 802.3 Standard,
Clause 40 and 27
R/W
0
4.10
Pause
0 = Pause operation disabled.
1 = Pause operation enabled for full-duplex link.
R/W
Note 2
4.9
100BASE-T4
0 = 100BASE-T4 capability is not available.
1 = 100BASE-T4 capability is available.
NOTE: The LXT972A Transceiver does not support
100BASE-T4 but allows this bit to be set to
advertise in the auto-negotiation sequence
for 100BASE-T4 operation. An external
100BASE-T4 Transceiver can be switched
in if this capability is desired.
R/W
0
4.8
100BASE-TX
full-duplex
(For LXT972A
Transceiver)
0 = Port is not 100BASE-TX full-duplex capable.
1 = Port is 100BASE-TX full-duplex capable.
R/W
Note 3
4.7
100BASE-TX
(For LXT972A
Transceiver)
0 = Port is not 100BASE-TX capable.
1 = Port is 100BASE-TX capable.
R/W
Note 3
4.6
10BASE-T
full-duplex
(For LXT972A
Transceiver)
0 = Port is not 10BASE-T full-duplex capable.
1 = Port is 10BASE-T full-duplex capable.
R/W
Note 3
4.5
10BASE-T
0 = Port is not 10BASE-T capable.
1 = Port is 10BASE-T capable.
R/W
Note 3
4.4:0
Selector Field,
S<4:0>
<00001> = IEEE 802.3.
<00010> = IEEE 802.9 ISLAN-16T.
<00000> = Reserved for future auto-negotiation
development.
<11111> = Reserved for future auto-negotiation
development.
NOTE: Unspecified or reserved combinations must
not be transmitted.
R/W
00001
1. R/W = Read/Write
RO = Read Only
2. Default setting is determined by pin 33 at reset.
3. Some bits have their default values determined at reset by hardware configuration pins. For default details
for these bits, see Section 5.4.4, “Hardware Configuration Settings”.
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