参数资料
| 型号： | XRT83L34IV-F |
| 厂商： | Exar Corporation |
| 文件页数： | 1/99页 |
| 文件大小： | 0K |
| 描述： | IC LIU T1/E1/J1 QUAD 128TQFP |
| 标准包装： | 72 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 4/4 |
| 规程： | T1，E1，J1 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 128-LQFP |
| 供应商设备封装： | 128-TQFP（14x20） |
| 包装： | 托盘 |
| 其它名称： | XRT83L34IV-F-ND |
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Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
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XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
FEBRUARY 2005
REV. 1.0.1
GENERAL DESCRIPTION
The XRT83L34 is a fully integrated Quad (four
channel) long-haul and short-haul line interface unit
for T1 (1.544Mbps) 100
, E1 (2.048Mbps) 75 or
120
, or J1 110 applications.
In long-haul applications the XRT83L34 accepts
signals that have been attenuated from 0 to 36dB at
772kHz in T1 mode (equivalent of 0 to 6000 feet of
cable loss) or 0 to 43dB at 1024kHz in E1 mode.
In T1 applications, the XRT83L34 can generate five
transmit pulse shapes to meet the short-haul Digital
Cross-Connect (DSX-1) template requirements as
well as for Channel Service Units (CSU) Line Build
Out (LBO) filters of 0dB, -7.5dB -15dB and -22.5dB
as
required
by
FCC
rules.
It
also
provides
programmable transmit pulse generators for each
channel that can be used for output pulse shaping
allowing performance improvement over a wide
variety of conditions.
The
XRT83L34
provides
both
a
parallel
Host
microprocessor interface as well as a Hardware
mode for programming and control.
Both the B8ZS and HDB3 encoding and decoding
functions are selectable as well as AMI. An on-chip
crystal-less jitter attenuator with a 32 or 64 bit FIFO
can be placed either in the receive or the transmit
path with loop bandwidths of less than 3Hz. The
XRT83L34 provides a variety of loop-back and
diagnostic features as well as transmit driver short
circuit detection and receive loss of signal monitoring.
It supports internal impedance matching for 75
,
100
, 110 and 120 for both transmitter and
receiver. In the absence of the power supply, the
transmit outputs and receive inputs are tri-stated
allowing
for
redundancy
applications
The
chip
includes an integrated programmable clock multiplier
that can synthesize T1 or E1 master clocks from a
variety of external clock sources.
APPLICATIONS
T1 Digital Cross-Connects (DSX-1)
ISDN Primary Rate Interface
CSU/DSU E1/T1/J1 Interface
T1/E1/J1 LAN/WAN Routers
Public switching Systems and PBX Interfaces
T1/E1/J1 Multiplexer and Channel Banks
Features (See Page 2)
FIGURE 1. BLOCK DIAGRAM OF THE XRT83L34 T1/E1/J1 LIU (HOST MODE)
One of four channels, CHANNEL_n - (n= 0:3)
HW /HO ST
WR_R/W
RD_DS
ALE_AS
CS
RDY_DT ACK
INT
ICT
TPOS_n/TDATA_n
TNEG_n/CO DES_n
TCLK_n
RCLK_n
RNEG_n/LCV_n
RPOS_n/RDATA_n
RLOS_n
RTIP_n
RRING_n
M AST ER CLOCK SYNT HESIZER
QRSS
PAT T ERN
G ENERAT O R
DMO_n
TTIP_n
TRING_n
TXON_n
HDB3/
B8ZS
ENCODER
TX/RX JITT ER
AT T ENUAT OR
TIMING
CO NT ROL
T X FILT ER
& PULSE
SHAPER
LINE
DRIVER
DRIVE
MO NIT OR
LOCAL
ANALOG
LOOPBACK
REMO T E
LOOPBACK
DIGIT AL
LO OPBACK
HDB3/
B8ZS
DECODER
TX/RX JITT ER
AT T ENUAT OR
TIMING &
DAT A
RECOVERY
PEAK
DET ECT O R
& SLICER
QRSS
DET ECT OR
NET W ORK
LO OP
DET ECT OR
RX
EQ UALIZER
EQUALIZER
CO NT ROL
AIS
DET ECT O R
LOS
DET ECT O R
LBO[3:0]
LO OPBACK
ENABLE
JA
SEL
EC
T
NLCD ENABLE
QRSS ENABLE
PTS1
PTS2
D[7:0]
PCLK
A[7:0]
RESET
M ICROPROCESSOR CONT RO LLER
TEST
DFM
TAO S
ENABLE
MCLKE1
MCLKT1
MCLKO UT
相关PDF资料 |
PDF描述 |
|---|---|
| XRT83L38IB-F | IC LIU T1/E1/J1 OCTAL 225BGA |
| XRT83SH314IB-F | IC LIU T1/E1/J1 14CH 304TBGA |
| XRT83SH38IB-F | IC LIU SH T1/E1/J1 8CH 225BGA |
| XRT86L30IV-F | IC LIU/FRAMER TI/E1/J1 SGL 128LQ |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XRT83L34IVTR | 功能描述:外围驱动器与原件 - PCI RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| XRT83L34IVTR-F | 功能描述:外围驱动器与原件 - PCI RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| XRT83L38 | 制造商:EXAR 制造商全称:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83L38_07 | 制造商:EXAR 制造商全称:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83L38ES | 功能描述:外围驱动器与原件 - PCI RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
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