参数资料
| 型号： | XRT83L34IV-F |
| 厂商： | Exar Corporation |
| 文件页数： | 18/99页 |
| 文件大小： | 0K |
| 描述： | IC LIU T1/E1/J1 QUAD 128TQFP |
| 标准包装： | 72 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 4/4 |
| 规程： | T1，E1，J1 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 128-LQFP |
| 供应商设备封装： | 128-TQFP（14x20） |
| 包装： | 托盘 |
| 其它名称： | XRT83L34IV-F-ND |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页当前第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页
xr
XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR REV. 1.0.1
22
TRATIO
INT
119
I
O
Transmitter Transformer Ratio Select - Hardware Mode
In external termination mode (TXSEL = 0), setting this pin "High" selects a
transformer ratio of 1:2 for the transmitter. A "Low" on this pin sets the trans-
mitter transformer ratio to 1:2.45. In the internal termination mode the
transmitter transformer ratio is permanently set to 1:2 and the state of this pin
is ignored.
Interrupt Output - Host Mode
This pin is asserted “Low” to indicate an alarm condition.
NOTE: This pin is an open drain output and requires an external 10k
pull-
up resistor.
RESET
121
I
Hardware Reset (Active "Low")
When this pin is tied “Low” for more than 10s, the device is put in the reset
state.
Pulling RESET and ICT pins “Low” simultaneously will put the chip in factory
test mode. This condition should not be permitted during normal operation.
NOTE: Internally pulled “High” with a 50k
resistor.
SR/DR
16
I
Single-Rail/Dual-Rail Data Format
Connect this pin "Low" to select transmit and receive data format in Dual-rail
mode. In this mode, HDB3 or B8ZS encoder and decoder are not available.
Connect this pin "High" to select single-rail data format.
NOTE: Internally pulled "Low" with a 50k
resistor.
LOOP1_0
LOOP0_0
LOOP1_1
LOOP0_1
LOOP1_2
LOOP0_2
LOOP1_3
LOOP0_3
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
42
43
44
45
46
47
48
49
42
43
44
45
46
47
48
49
I/O
Loop-Back Control Pins - Hardware Mode:
Loop-back control pin 1 - Channel _0
Loop-back control pin 0 - Channel _0
Loop-back control pin 1 - Channel _1
Loop-back control pin 0 - Channel _1
Loop-back control pin 1 - Channel _2
Loop-back control pin 0 - Channel _2
Loop-back control pin 1 - Channel _3
Loop-back control pin 0 - Channel _3
Microprocessor R/W Data bits [7:0] - Host Mode
These pins are microprocessor data bus pins.
NOTE: These pins are internally pulled “Low” with a 50k
resistor.
SIGNAL NAME
PIN #TYPE
DESCRIPTION
LOOP1_n
LOOP0_n
0
1
0
1
MODE
Normal Mode No Loop-back Channel_n
Local Loop-Back Channel_n
Remote Loop-Back Channel_n
Digital Loop-Back Channel_n
相关PDF资料 |
PDF描述 |
|---|---|
| XRT83L38IB-F | IC LIU T1/E1/J1 OCTAL 225BGA |
| XRT83SH314IB-F | IC LIU T1/E1/J1 14CH 304TBGA |
| XRT83SH38IB-F | IC LIU SH T1/E1/J1 8CH 225BGA |
| XRT86L30IV-F | IC LIU/FRAMER TI/E1/J1 SGL 128LQ |
| XRT86VL30IV-F | IC FRAMR/LIU T1/E1/J1 QD 128LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XRT83L34IVTR | 功能描述:外围驱动器与原件 - PCI RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| XRT83L34IVTR-F | 功能描述:外围驱动器与原件 - PCI RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| XRT83L38 | 制造商:EXAR 制造商全称:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83L38_07 | 制造商:EXAR 制造商全称:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83L38ES | 功能描述:外围驱动器与原件 - PCI RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
发布紧急采购，3分钟左右您将得到回复。