参数资料
型号: XRT83L34IV-F
厂商: Exar Corporation
文件页数: 66/99页
文件大小: 0K
描述: IC LIU T1/E1/J1 QUAD 128TQFP
标准包装: 72
类型: 线路接口装置(LIU)
驱动器/接收器数: 4/4
规程: T1,E1,J1
电源电压: 3.135 V ~ 3.465 V
安装类型: 表面贴装
封装/外壳: 128-LQFP
供应商设备封装: 128-TQFP(14x20)
包装: 托盘
其它名称: XRT83L34IV-F-ND
xr
XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR REV. 1.0.1
66
TABLE 22: MICROPROCESSOR REGISTER #2, BIT DESCRIPTION
REGISTER ADDRESS
0000010
0010010
0100010
0110010
CHANNEL_n
CHANNEL_0
CHANNEL_1
CHANNEL_2
CHANNEL_3
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #
NAME
D7
INVQRSS_n Invert QRSS Pattern: When TQRSS is active, Writing a “1” to
this bit inverts the polarity of transmitted QRSS pattern. Writing
a “0” sends the QRSS pattern with no inversion.
R/W
0
D6
TXTEST2_n
Transmit Test Pattern bit 2: This bit together with TXTEST1
and TXTEST0 are used to generate and transmit test patterns
according to the following table:
TDQRSS (Transmit/Detect Quasi-Random Signal): This
condition when activated enables Quasi-Random Signal
Source generation and detection for the selected channel
number n. In a T1 system QRSS pattern is a 220-1 pseudo-
random bit sequence (PRBS) with no more than 14 consecu-
tive zeros. In a E1 system, QRSS is a 215-1 PRBS pattern.
TAOS (Transmit All Ones): Activating this condition enables
the transmission of an All Ones Pattern from the selected
channel number n.
TLUC (Transmit Network Loop-Up Code): Activating this
condition enables the Network Loop-Up Code of “00001” to be
transmitted to the line for the selected channel number n.
When Network Loop-Up code is being transmitted, the
XRT83L34 will ignore the Automatic Loop-Code detection and
Remote Loop-Back activation (NLCDE1 =“1”, NLCDE0 =“1”, if
activated) in order to avoid activating Remote Digital Loop-
Back automatically when the remote terminal responds to the
Loop-Back request.
TLDC (Transmit Network Loop-Down Code): Activating this
condition enables the network Loop-Down Code of “001” to be
transmitted to the line for the selected channel number n.
R/W
0
D5
TXTEST1_n
Transmit Test pattern bit 1: See description of bit D6 for the
function of this bit.
R/W
0
D4
TXTEST0_n
Transmit Test Pattern bit 0: See description of bit D6 for the
function of this bit.
R/W
0
1
0
1
X
0
No Pattern
TDQRSS
TAOS
TLUC
Test Pattern
TLDC
TXTEST1
TXTEST0
TXTEST2
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