参数资料
| 型号： | XRT83L34IV-F |
| 厂商： | Exar Corporation |
| 文件页数： | 19/99页 |
| 文件大小： | 0K |
| 描述： | IC LIU T1/E1/J1 QUAD 128TQFP |
| 标准包装： | 72 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 4/4 |
| 规程： | T1，E1，J1 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 128-LQFP |
| 供应商设备封装： | 128-TQFP（14x20） |
| 包装： | 托盘 |
| 其它名称： | XRT83L34IV-F-ND |
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XRT83L34
xr
REV. 1.0.1
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
23
EQC4
EQC3
EQC2
EQC1
EQC0
A[4]
A[3]
A[2]
A[1]
A[0]
59
60
61
62
63
59
60
61
62
63
I
Equalizer Control Input 4 - Hardware Mode
This pin together with EQC[3:0] are used for controlling the transmit pulse
shaping, transmit line build-out (LBO), receive monitoring and also to select
T1, E1 or J1 Modes of operation. See Table 4 for description of Transmit
Equalizer Control bits.
Equalizer Control Input 3
Equalizer Control Input 2
Equalizer Control Input 1
Equalizer Control Input 0
NOTES:
1.
In Hardware mode all transmit channels share the same pulse
setting controls function.
2.
All channels of an XRT83L34 must operate at the same clock rate,
either the T1, E1 or J1 modes.
Microprocessor Address bits [4:0] - Host Mode
NOTE: Internally pulled “Low” with a 50k
resistor for all channels.
RXTSEL
110
I
Receiver Termination Select
In Hardware mode, when this pin is “Low” the receive line termination is
determined only by the external resistor. When “High”, the receive termina-
tion is realized by internal resistors or the combination of internal and exter-
nal resistors. These conditions are described in the table below.
NOTE: In Hardware mode all channels share the same RXTSEL control
function.
In Host mode, the RXTSEL_n bits in the channel control registers deter-
mines if the receiver termination is external or internal. However the function
of RXTSEL can be transferred to the Hardware pin by setting the TERCNTL
bit (bit 4) to “1” in the register 66 address hex 0x42.
NOTE: Internally pulled “Low” with a 50k
resistor.
TXTSEL
111
I
Transmit Termination Select - Hardware Mode
When this pin is “Low” the transmit line termination is determined only by an
external resistor. When “High”, the transmit termination is realized only by
the internal resistor.
NOTES:
1.
This pin is internally pulled "Low" with a 50k
resistor.
2.
In Hardware Mode all channels share the same TXTSEL control
function.
SIGNAL NAME
PIN #TYPE
DESCRIPTION
RXTSEL
RX Termination
0
1
External
Internal
TXTSEL
TX Termination
0
1
External
Internal
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XRT83L34IVTR | 功能描述:外围驱动器与原件 - PCI RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| XRT83L34IVTR-F | 功能描述:外围驱动器与原件 - PCI RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| XRT83L38 | 制造商:EXAR 制造商全称:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83L38_07 | 制造商:EXAR 制造商全称:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83L38ES | 功能描述:外围驱动器与原件 - PCI RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
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