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参数资料
| 型号： | ZL30402/QCG1 |
| 厂商： | ZARLINK SEMICONDUCTOR INC |
| 元件分类： | 数字传输电路 |
| 英文描述： | ATM/SONET/SDH SUPPORT CIRCUIT, PQFP80 |
| 封装： | 14 X 14 MM, 1.40 MM HEIGHT, LEAD FREE, MS-026BEC, LQFP-80 |
| 文件页数： | 10/44页 |
| 文件大小： | 472K |
| 代理商： | ZL30402/QCG1 |
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ZL30402
Data Sheet
18
Zarlink Semiconductor Inc.
Figure 6 - Hardware and Software Control options
4.1
Hardware Control
The Hardware control is a subset of software control and it will only be briefly described with cross-referencing to
Software control programmable registers.
4.1.1
Control Pins
The ZL30402 has six dedicated control pins for selecting modes of operation and activating different functions.
These pins are listed below:
MS2 and MS1 pins: Mode Select: The MS2 (pin 19) and MS1 (pin 18) inputs select the PLL mode of operation.
See Table 1 for details. The logic level at these inputs is sampled by the rising edge of the F8o frame pulse.
FCS pin: Filter Characteristic Select. The FCS (pin 9) input is used to select the filtering characteristics of the
Core PLL. See Table 2 on page 19 for details.
MS2
MS1
Mode of Operation
0
Normal mode
0
1
Holdover mode
10
Free-run
11
Reserved
Table 1 - Operating Modes and States
Hardware Control
Software Control
HW = 1
C
O
N
T
R
O
L
S
T
A
T
U
S
C
O
N
T
R
O
L
S
T
A
T
U
S
MS2
MS1
FCS
RefSel
RefAlign
AHRD
MHR
HW = 0
LOCK
HOLDOVER
FLIM
PAH
PAFL
SAH
SAFL
P
Pins
LOCK
HOLDOVER
MS2
MS1
FCS
RefSel
RefAlign
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| ZL30406 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:SONET/SDH Clock Multiplier PLL |
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