参数资料
型号: ZL50408GDG2
厂商: CONEXANT SYSTEMS
元件分类: 网络接口
英文描述: DATACOM, LAN SWITCHING CIRCUIT, PBGA208
封装: 17 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, MO-192, LBGA-208
文件页数: 141/144页
文件大小: 1779K
代理商: ZL50408GDG2
ZL50408
Data Sheet
96
Zarlink Semiconductor Inc.
12.3.6.6
RDRC1 – WRED Rate Control 1
IC Address: h091; CPU Address: h0514
Accessed by CPU and IC (R/W)
12.3.6.7
RDRC2 – WRED Rate Control 2
CPU Address: h0515
Accessed by CPU (R/W)
12.3.6.8
SFCB – Share FCB Size
IC Address: h074; CPU Address: h0518
Accessed by CPU and IC (R/W)
12.3.6.9
C1RS – Class 1 Reserve Size
IC Address: h075; CPU Address: h0519
Accessed by CPU and IC (R/W)
Buffer reservation for class 1. Granularity 16 granules. (Default 0)
12.3.6.10
C2RS – Class 2 Reserve Size
IC Address: h076; CPU Address: h051A
Accessed by CPU and IC (R/W)
Buffer reservation for class 2. Granularity 16 granules. (Default 0)
Bits [3:0]:
Corresponds to the frame drop percentage B% for RED. Granularity 6.25%.
Bits [7:4]:
Corresponds to the frame drop percentage Z% for WRED. Granularity
6.25%.
See Programming QoS Registers application note, ZLAN-42, for more information
Bits [3:0]:
Corresponds to the frame drop percentage RB% for ingress rate control.
Granularity 6.25%.
Bits [7:4]:
Corresponds to the frame drop percentage RA% for ingress rate control.
Granularity 6.25%.
See Rate Control application note, ZLAN-33, for more information
Bits [7:0]:
Expressed in multiples of 16 granules. Buffer reservation for shared pool.
Bits [7:0]:
Class 1 FCB Reservation
Bits [7:0]:
Class 2 FCB Reservation
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