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参数资料
| 型号： | ZL50408GDG2 |
| 厂商： | CONEXANT SYSTEMS |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, LAN SWITCHING CIRCUIT, PBGA208 |
| 封装： | 17 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, MO-192, LBGA-208 |
| 文件页数： | 69/144页 |
| 文件大小： | 1779K |
| 代理商： | ZL50408GDG2 |
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ZL50408
Data Sheet
30
Zarlink Semiconductor Inc.
Other available instructions for the ZL50408 include:
IDCODE – the IDCODE instruction causes the TDI and TDO to be connected to the IDCODE register.
HIGHZ – the HIGHZ instruction causes all of the logic outputs to be placed in an inactive drive state (e.g.,
high impedance).
3.0
Management and Configuration
One extra port is dedicated to the CPU via the CPU interface module. Three modes this port can operate:
managed, lightly managed or unmanaged mode. The different between these modes is tx/rx Ethernet frame, tx/rx
control frame and receiving interrupt due to the lack of constant attention or processing power from the CPU.
The CPU interface utilizes a 8/16-bit bus in managed mode. It also supports a serial+MII, serial only, and an I2C
interface, which provides an easy and lower cost way to configure the system for reduced management.
Supported CPU interface modes are
1. 16-bit CPU interface similar to the Industry Standard Architecture (ISA) specification.
2. 8-bit CPU interface similar to ISA.
3. Serial with MII. A synchronous serial interface (SSI) bus is used for accessing the configuration register and
control frame. MII is used for sending and receiving CPU packets.
4. Lightly Managed Serial. Configuration registers access, Control frame and CPU transmit/receive packets are
sent through a synchronous serial interface (SSI) bus.
5. Unmanaged Serial. The device can be configured by EEPROM using an IC interface at bootup, or via a syn-
chronous serial interface (SSI) otherwise. All configuration registers and internal control blocks are accessible
by the interface. However, the CPU cannot receive or transmit frames nor will it receive any interrupt informa-
tion.
The CPU interface provides for easy and effective management of the switching system.
Operation Mode
ISA Interface
Serial
MII
IC
16-bit CPU
16-bit
NA
8-bit CPU
8-bit
NA
Serial with MII interface
NA
Yes
No
Lightly Managed Serial
NA
Yes
No
Unmanaged Serial
NA
Yes
No
Yes
Table 6 - Supported CPU interface modes
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ZL50409 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:Managed 9-Port 10/100M Ethernet Switch |
| ZL50409GDC | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:Managed 9-Port 10/100M Ethernet Switch |
| ZL50409GDC1 | 制造商:Microsemi Corporation 功能描述: |
| ZL50410 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:Managed 8-Port 10/100M + 1-Port 10/100/1000M Ethernet Switch |
| ZL50410GDC208 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:Managed 8-Port 10/100M + 1-Port 10/100/1000M Ethernet Switch |
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