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参数资料
| 型号： | ZL6100EVAL2Z |
| 厂商： | Intersil |
| 文件页数： | 11/34页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD 2CH USB ZL6100 |
| 标准包装： | 1 |
| 系列： | * |
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ZL6100
The SMBus device address and VOUT_MAX are the only
parameters that must be set by external pins. All other device
parameters can be set via the I 2 C/SMBus. The device address is
set using the SA0 and SA1 pins. VOUT_MAX is determined as
10% greater than the voltage set by the V0 and V1 pins.
Power Conversion Functional Description
Internal Bias Regulators and Input Supply
Connections
The ZL6100 employs two internal low dropout (LDO)
regulators to supply bias voltages for internal circuitry,
Output Voltage Selection
STANDARD MODE
The output voltage may be set to any voltage between 0.6V
and 5.0V provided that the input voltage is higher than the
desired output voltage by an amount sufficient to prevent the
device from exceeding its maximum duty cycle specification.
Using the pin-strap method, V OUT can be set to any of nine
standard voltages as shown in Table 2.
TABLE 2. PIN-STRAP OUTPUT VOLTAGE SETTINGS
V0
allowing it to operate from a single input supply. The internal
LOW
OPEN
HIGH
bias regulators are as follows:
LOW
0.6V
0.8V
1.0V
? VR:The VR LDO provides a regulated 5V bias supply for
the MOSFET driver circuits. It is powered from the VDD
pin. A 4.7μF filter capacitor is required at the VR pin.
V1
OPEN
HIGH
1.2V
2.5V
1.5V
3.3V
1.8V
5.0V
? V25:The V25 LDO provides a regulated 2.5V bias supply
for the main controller circuitry. It is powered from an
internal 5V node. A 10μF filter capacitor is required at the
V25 pin.
When the input supply (VDD) is higher than 5.5V, the VR pin
should not be connected to any other pins. It should only
have a filter capacitor attached as shown in Figure 7. Due to
the dropout voltage associated with the VR bias regulator,
the VDD pin must be connected to the VR pin for designs
operating from a supply below 5.5V. Figure 7 illustrates the
required connections for both cases.
The resistor setting method can be used to set the output
voltage to levels not available in Table 2. Resistors R0 and
R1 are selected to produce a specific voltage between 0.6V
and 5.0V in 10mV steps. Resistor R1 provides a coarse
setting and resistor R0 provides a fine adjustment, thus
eliminating the additional errors associated with using two
1% resistors (this typically adds ~1.4% error).
To set V OUT using resistors, follow the steps below to calculate
an index value and then use Table 3 to select the resistor that
corresponds to the calculated index value as follows:
V IN
VDD
ZL6100
VR
3V ≤ V IN ≤ 5.5V
V IN
VDD
ZL6100
VR
5.5V < V IN ≤ 14V
1. Calculate Index1:
Index1 = 4 x V OUT (V OUT in 10mV steps)
2. Round the result down to the nearest whole number.
3. Select the value of R1 from Table 3 using the Index1
rounded value from Step 2.
4. Calculate Index0: Index0 = 100 x V OUT – (25 x Index1)
5. Select the value of R0 from Table 3 using the Index0
FIGURE 7. INPUT SUPPLY CONNECTIONS
Note: the internal bias regulators are not designed to be
outputs for powering other circuitry. Do not attach external
loads to any of these pins. The multi-mode pins may be
connected to the V25 pin for logic HIGH settings.
High-side Driver Boost Circuit
The gate drive voltage for the high-side MOSFET driver is
generated by a floating bootstrap capacitor, CB
(see Figure 4). When the lower MOSFET (QL) is turned on,
the SW node is pulled to ground and the capacitor is
charged from the internal VR bias regulator through diode
DB. When QL turns off and the upper MOSFET (QH) turns
on, the SW node is pulled up to V DD and the voltage on the
bootstrap capacitor is boosted approximately 5V above V DD
to provide the necessary voltage to power the high-side
driver. A Schottky diode should be used for DB to help
maximize the high-side drive supply voltage.
11
value from Step 4.
FN6876.3
August 29, 2012
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ZL6105 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Digital DC/DC Controller with Drivers and Auto |
| ZL6105ALAF | 功能描述:IC REG CTRLR BUCK PWM VM 36-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:75 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:1MHz 占空比:81% 电源电压:4.3 V ~ 13.5 V 降压:是 升压:是 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:0°C ~ 70°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:管件 产品目录页面:1051 (CN2011-ZH PDF) 其它名称:296-2543-5 |
| ZL6105ALAF-01 | 制造商:Intersil Corporation 功能描述:ADAPTIVE DIGITAL DC-DC CONTROLLER W/ DRIVERS & I-SHARING - B - Trays |
| ZL6105ALAFT | 功能描述:IC REG CTRLR BUCK PWM VM 36-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ZL6105ALAFTK | 功能描述:IC REG CTRLR BUCK PWM VM 36-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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