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参数资料
| 型号： | ZL6100EVAL2Z |
| 厂商： | Intersil |
| 文件页数： | 13/34页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD 2CH USB ZL6100 |
| 标准包装： | 1 |
| 系列： | * |
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ZL6100
TABLE 4. POLA MODE V OUT SETTINGS (R0 = 110k,
R1 = R SET + 10k)
The DOSA mode V OUT settings are listed in Table 5.
TABLE 5. DOSA MODE V OUT SETTINGS (R0 = 110k,
R SET
IN SERIES WITH
R SET
IN SERIES
R1 = R SET + 8.66k)
10k Ω
WITH 10k Ω
R SET
R SET
V OUT
(V)
RESISTOR
(k Ω )
V OUT
(V)
RESISTOR
(k Ω )
IN SERIES
WITH 8.66k Ω
IN SERIES
WITH 8.66k Ω
0.700
0.752
0.758
0.765
0.772
0.790
0.800
0.821
0.834
0.848
0.880
0.899
0.919
0.965
162
110
100
90.9
82.5
75.0
56.2
51.1
46.4
42.2
34.8
31.6
28.7
23.7
0.991
1.000
1.100
1.158
1.200
1.250
1.500
1.669
1.800
2.295
2.506
3.300
5.000
21.5
19.6
16.2
13.3
12.1
9.09
7.50
5.6
4.64
2.87
2.37
1.21
0.162
V OUT
(V)
0.700
0.752
0.758
0.765
0.772
0.790
0.800
0.821
0.834
0.848
0.880
0.899
0.919
RESISTOR
(k Ω )
162
113
100
90.9
82.5
75.0
57.6
52.3
47.5
43.2
36.5
33.2
30.1
V OUT
(V)
0.991
1.000
1.100
1.158
1.200
1.250
1.500
1.669
1.800
2.295
2.506
3.300
5.000
RESISTOR
(k Ω )
22.6
21.0
17.8
14.7
13.3
10.5
8.87
6.98
6.04
4.32
3.74
2.61
1.50
DOSA VOLTAGE TRIM MODE
0.965
25.5
R SET = ----------------------------------
6900
V OUT – 0.69 V
On a DOSA module, the V OUT setting follows Equation 4:
(EQ. 4)
To maintain DOSA compatibility, the same scheme is used
as with a POLA module except the 10k Ω resistor is replaced
with a 8.66k resistor as shown in Figure 11.
Start-up Procedure
The ZL6100 follows a specific internal start-up procedure
after power is applied to the VDD pin. Table 6 describes the
start-up sequence.
If the device is to be synchronized to an external clock source,
the clock frequency must be stable prior to asserting the EN
pin. The device requires approximately 5ms to 10ms to check
for specific values stored in its internal memory. If the user has
stored values in memory, those values will be loaded. The
DOSA
MODULE
ZL6100
V0 V1
device will then check the status of all multi-mode pins and
load the values associated with the pin settings.
Once this process is completed, the device is ready to
110 k Ω
8.66 k Ω
R SET
accept commands via the I 2 C/SMBus interface and the
device is ready to be enabled. Once enabled, the device
requires approximately 2ms before its output voltage may be
allowed to start its ramp-up process. If a soft-start delay
period less than 2ms has been configured (using DLY pins
or PMBus commands), the device will default to a 2ms delay
period. If a delay period greater than 2ms is configured, the
device will wait for the configured delay period prior to
FIGURE 11. R SET ON A DOSA MODULE
13
starting to ramp its output.
After the delay period has expired, the output will begin to
ramp towards its target voltage according to the
pre-configured soft-start ramp time that has been set using
the SS pin. It should be noted that if the EN pin is tied to
VDD, the device will still require approx 5ms to 10ms before
the output can begin its ramp-up as described in Table 6.
FN6876.3
August 29, 2012
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