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参数资料
| 型号： | ZL6100EVAL2Z |
| 厂商： | Intersil |
| 文件页数： | 4/34页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD 2CH USB ZL6100 |
| 标准包装： | 1 |
| 系列： | * |
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ZL6100
Electrical Specifications
V DD = 12V, T A = -40°C to +85°C, unless otherwise specified. Typical values are at T A = +25°C. Boldface limits
apply over the operating temperature range, -40°C to +85°C. (Continued)
MIN
MAX
PARAMETER
Soft-start Delay Duration Range (Note 12)
CONDITIONS
Set using DLY pin or resistor
(Note 19)
2
TYP
–
(Note 19)
200
UNIT
ms
Set using
I 2 C/SMBus
0.002
–
500
s
Soft-start Delay Duration Accuracy
Soft-start Ramp Duration Range
Turn-on delay (precise mode) (Notes 12, 13)
Turn-on delay (normal mode) (Note 14)
Turn-off delay (Note 14)
Set using SS pin or resistor
–
–
–
0
±0.25
-1/+5
-1/+5
–
–
–
–
200
ms
ms
ms
ms
Soft-start Ramp Duration Accuracy
Set using
I 2 C
pin
0
–
–
100
200
–
ms
μs
LOGIC INPUT/OUTPUT CHARACTERISTICS
Logic Input Leakage Current
Logic Input Low, V IL
Logic Input OPEN (N/C)
Logic Input high, V IH
Logic Output Low, V OL
Logic Output High, V OH
Push-Pull Logic pins
Multi-mode logic pins
I OL ≤ 4mA (Note 18)
I OH ≥ -2mA (Note 18)
-250
–
–
2.0
–
2.25
–
–
1.4
–
–
–
250
0.8
–
–
0.4
–
nA
V
V
V
V
V
OSCILLATOR AND SWITCHING CHARACTERISTICS
Switching Frequency Range
200
–
1400
kHz
Switching Frequency Set-point Accuracy
Maximum PWM Duty Cycle
Minimum SYNC Pulse Width
Input Clock Frequency Drift Tolerance
Predefined settings (see Table 12)
Factory default
External clock source
-5
95
150
-13
–
–
–
–
5
–
–
13
%
%
ns
%
GATE DRIVERS
High-side Driver Voltage
High-side Driver Peak Gate Drive Current
(V BST - V SW )
(V BST - V SW ) = 4.5V
–
2
4.5
3
–
–
V
A
(Pull-down)
High-side Driver Pull-up Resistance
High-side Driver Pull-down Resistance
Low-side Driver Peak Gate Drive Current
(V BST - V SW ) = 4.5V, (V BST - V GH ) = 50mV
(V BST - V SW ) = 4.5V, (V GH - V SW ) = 50mV
V R = 5V
–
–
–
0.8
0.5
2.5
2
2
–
Ω
Ω
A
(Pull-up)
Low-side Driver Peak Gate Drive
V R = 5V
–
1.8
–
A
Current (pull-down)
Low-side Driver Pull-up Resistance
Low-side Driver Pull-down Resistance
V R = 5V, (V R - V GL ) = 50mV
V R = 5V, (V GL - PGND) = 50mV
–
–
1.2
0.5
2
2
Ω
Ω
SWITCHING TIME
GH Rise and Fall time
GL Rise and Fall time
(V BST - V SW ) = 4.5V, C LOAD = 2.2nF
V R = 5V, C LOAD = 2.2nF
–
–
5
5
20
20
ns
ns
TRACKING
VTRK Input Bias Current
VTRK Tracking Ramp Accuracy
VTRK Regulation Accuracy
VTRK = 5.5V
100% Tracking, V OUT - VTRK
100% Tracking, V OUT - VTRK
–
-100
-1
110
–
–
200
+100
1
μA
mV
%
FAULT PROTECTION CHARACTERISTICS
UVLO Threshold Range
Configurable via I 2 C/SMBus
2.85
–
16
V
4
FN6876.3
August 29, 2012
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