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| 型号： | AD9887AKSZ-140 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 37/52页 |
| 文件大小： | 0K |
| 描述： | IC INTRFACE ANALOG/DVI 160-MQFP |
| 标准包装： | 24 |
| 应用： | 图形卡，VGA 接口 |
| 接口： | 模拟和数字 |
| 电源电压： | 3.15 V ~ 3.45 V |
| 封装/外壳： | 160-BQFP |
| 供应商设备封装： | 160-MQFP（28x28） |
| 包装： | 托盘 |
| 安装类型： | 表面贴装 |
| 产品目录页面： | 788 (CN2011-ZH PDF) |
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AD9887A
Rev. B | Page 42 of 52
0x12 0
PWRDN
This bit can be used to fully power down both interfaces
of the chip. See the Power Management section for
details on which blocks are actually powered down. Note
that the chip is unable to detect incoming activity while
fully powered down.
Table 44. Power-Down Settings
Select
Result
0
Power down
1
Normal operation
The default for this register is 1.
Digital Control
0x13 7:0
Sync Separator Threshold
This register is used to set the responsiveness of the sync
separator. It sets the number of 5 MHz clock pulses the
sync separator counts before toggling high or low. It works
like a low-pass filter to ignore Hsync pulses in order to
extract the Vsync signal. This register should be set to a
number greater than the maximum Hsync pulse width.
The default for this register is 32.
Control Bits
0x14 2
Scan Enable
This register is used to enable the scan function. When
this function is enabled, data can be loaded into the
AD9887A outputs serially. The scan function utilizes
three pins: SCANIN, SCANOUT, and SCANCLK. These pins
are described in the Scan Function section.
Table 45. Scan Enable Settings
Scan Enable
Result
0
Scan function disabled
1
Scan function enabled
The default for scan enable is 0 (disabled).
0x14 1
COAST Input Polarity Override
This register is used to override the internal circuitry
that determines the polarity of the coast signal going
into the PLL.
Table 46. COAST Input Polarity Override Settings
Override Bit
Result
0
Coast polarity determined by chip
1
Coast polarity determined by user
The default for coast polarity override is 0.
0x14 0
HSYNC Input Polarity Override
This register is used to override the internal circuitry
that determines the polarity of the Hsync signal going
into the PLL.
Table 47. HSYNC Input Polarity Override Setting
Override Bit
Result
0
HSYNC input polarity determined by chip
1
HSYNC input polarity determined by user
The default for HSYNC input polarity override is 0.
0x15 7
HSYNC Input Polarity Status
This bit reports the status of the HSYNC input polarity
detection circuit. It can be used to determine the polarity
of the HSYNC input. The location of the detection
circuit is shown in the Figure 43.
Table 48. Detected HSYNC Input Polarity Status
Status
Result
0
HSYNC input polarity is negative.
1
HSYNC input polarity is positive.
0x15 6
VSYNC Output Polarity Status
This bit reports the status of the VSYNC output polarity
detection circuit. It can be used to determine the polarity
of the VSYNC input. The location of the detection
circuit is shown in the Figure 43.
Table 49. Detected Vsync Input Polarity Status
Status
Result
0
Vsync input polarity is active low.
1
Vsync input polarity is active high.
0x15 5
COAST Input Polarity Status
This bit reports the status of the COAST input polarity
detection circuit. It can be used to determine the polarity
of the coast input. The location of the detection circuit is
shown in the Figure 43.
Table 50. Detected COAST Input Polarity Status
Status
Result
0
Coast input polarity is negative.
1
Coast input polarity is positive.
0x16 7–3
Sync-on-Green Slicer Threshold
This register allows the comparator threshold of the
sync-on-green slicer to be adjusted. This register adjusts
the comparator threshold in 10 mV steps. A setting of 0
results in a 330 mV threshold; a setting of 31 results in a
10 mV threshold. The default setting is 23, which corre-
sponds to a threshold value of 70 mV.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9887AKSZ-1401 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual Interface for Flat Panel Display |
| AD9887AKSZ-170 | 功能描述:IC INTRFACE ANALOG/DVI 160-MQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1 |
| AD9887AKSZ-170 | 制造商:Analog Devices 功能描述:IC DUAL DISPLAY INTERFACE |
| AD9887AKSZ-1701 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual Interface for Flat Panel Display |
| AD9887APCB | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual Interface for Flat Panel Displays |
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