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| 型号： | AD9887AKSZ-140 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 40/52页 |
| 文件大小： | 0K |
| 描述： | IC INTRFACE ANALOG/DVI 160-MQFP |
| 标准包装： | 24 |
| 应用： | 图形卡，VGA 接口 |
| 接口： | 模拟和数字 |
| 电源电压： | 3.15 V ~ 3.45 V |
| 封装/外壳： | 160-BQFP |
| 供应商设备封装： | 160-MQFP（28x28） |
| 包装： | 托盘 |
| 安装类型： | 表面贴装 |
| 产品目录页面： | 788 (CN2011-ZH PDF) |
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AD9887A
Rev. B | Page 45 of 52
2-Wire Serial Control Port
A 2-wire serial interface control port is provided. Up to four
AD9887A devices can be connected to the 2-wire serial
interface, with each device having a unique address.
The 2-wire serial interface comprises a clock (SCL) and a
bidirectional data (SDA) pin. The analog flat panel interface
acts as a slave for receiving and transmitting data over the serial
interface. When the serial interface is not active, the logic levels
on SCL and SDA are pulled high by external pull-up resistors.
Data received or transmitted on the SDA line must be stable for
the duration of the positive-going SCL pulse. Data on SDA must
change only when SCL is low. If SDA changes state while SCL
is high, the serial interface interprets that action as a start or
stop sequence.
There are five components to serial bus operation:
Start signal
Slave address byte
Base register address byte
Data byte to read or write
Stop signal
When the serial interface is inactive (SCL and SDA are high),
communication is initiated by sending a start signal. The start
signal is a high-to-low transition on SDA while SCL is high.
This signal alerts all slaved devices that a data transfer sequence
is coming.
The first eight bits of data transferred after a start signal comprise
a 7-bit slave address (the first seven bits) and a single R/W bit
(the eighth bit). The R/W bit indicates the direction of data transfer,
reading from (1) or writing to (0) the slave device. If the trans-
mitted slave address matches the address of the device (set by
the state of the A1 and A0 input pins listed in Table 60), the
AD9887A acknowledges it by bringing SDA low on the ninth
SCL pulse. If the addresses do not match, the AD9887A does
not acknowledge it.
Table 60. Serial Port Addresses
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
A6 (MSB)
A5
A4
A3
A2
A1
A0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Data Transfer via Serial Interface
For each byte of data read or written, the MSB is the first bit of
the sequence.
If the AD9887A does not acknowledge the master device
during a write sequence, the SDA remains high so that the
master can generate a stop signal. If the master device does
not acknowledge the AD9887A during a read sequence, the
AD9887A interprets this as the end of the data. The SDA
remains high so that the master can generate a stop signal.
Writing data to a specific control register of the AD9887A
requires writing to its 8-bit address after the slave address has
been established. This control register address is the base
address for subsequent write operations. The base address auto-
increments by one for each byte of data written after the data
byte intended for the base address is established. If more bytes
are transferred than there are available addresses, the address
does not increment and remains at its maximum value of 0x1D.
Any base address higher than 0x1D does not produce an
acknowledge signal.
Data is read from the control registers of the AD9887A in a
similar manner. Reading requires two data transfer operations.
The base address must be written with the R/W bit of the slave
address byte low to set up a sequential read operation.
Reading begins at the previously established base address with
the R/W bit of the slave address byte high. The address of the
read register auto-increments after each byte is transferred.
To terminate a read/write sequence to the AD9887A, a stop
signal must be sent. A stop signal comprises a low-to-high
transition of SDA while SCL is high. The timing for the
read/write operations is shown in Figure 41; a typical byte
transfer is shown in Figure 42.
A repeated start signal occurs when the master device driving
the serial interface generates a start signal without first generating
a stop signal to terminate the current communication. This is
used to change the mode of communication (read, write) between
the slave and master without releasing the serial interface lines.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9887AKSZ-1401 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual Interface for Flat Panel Display |
| AD9887AKSZ-170 | 功能描述:IC INTRFACE ANALOG/DVI 160-MQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1 |
| AD9887AKSZ-170 | 制造商:Analog Devices 功能描述:IC DUAL DISPLAY INTERFACE |
| AD9887AKSZ-1701 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual Interface for Flat Panel Display |
| AD9887APCB | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual Interface for Flat Panel Displays |
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