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型号： ADSP-BF561SKBCZ-6V
厂商： Analog Devices Inc
文件页数： 20/64页
文件大小： 0K
描述： IC DSP 32BIT 600MHZ 256CSPBGA
产品培训模块： Blackfin® Processor Core Architecture Overview
Blackfin® Device Drivers
Blackfin® Optimizations for Performance and Power Consumption
Blackfin® System Services
标准包装： 1
系列： Blackfin®
类型： 定点
接口： SPI，SSP，UART
时钟速率： 600MHz
非易失内存： 外部
芯片上RAM： 328kB
电压 - 输入/输出： 2.50V，3.30V
电压 - 核心： 1.35V
工作温度： 0°C ~ 70°C
安装类型： 表面贴装
封装/外壳： 256-LFBGA，CSPBGA
供应商设备封装： 256-CSPBGA（12x12）
包装： 托盘
配用： ADZS-BFAUDIO-EZEXT-ND - BOARD EVAL AUDIO BLACKFIN
ADZS-BF561-EZLITE-ND - BOARD EVAL ADSP-BF561
ADZS-BF561-MMSKIT-ND - KIT STARTER MULTIMEDIA BF561
ADZS-BFAV-EZEXT-ND - BOARD DAUGHT ADSP-BF533,37,61KIT
ADSP-BF561 
SPECIFICATIONS
Component specifications are subject to change without notice.
OPERATING CONDITIONS
Parameter
Conditions
Min
Nominal
Max
Unit
V DDINT
V DDINT
V DDINT
V DDEXT
V DDEXT
V IH
V IL
T J
T J
Internal Supply Voltage 1
Internal Supply Voltage 3
Internal Supply Voltage 3
External Supply Voltage
External Supply Voltage
High Level Input Voltage 4, 5
Low Level Input Voltage 5
Junction Temperature
Junction Temperature
Non automotive 500 MHz and 533 MHz speed grade models 2
600 MHz speed grade models 2
Automotive grade models 2
Non automotive grade models 2
Automotive grade models 2
256-Ball CSP_BGA (12 mm × 12 mm) @ T AMBIENT = 0°C to +70°C
256-Ball CSP_BGA (17 mm × 17 mm) @ T AMBIENT = 0°C to +70°C
0.8
0.8
0.95
2.25
2.7
2.0
–0.3
0
0
1.25
1.35
1.25
2.5, or 3.3
3.3
1.375
1.4185
1.375
3.6
3.6
3.6
+0.6
+105
+95
V
V
V
V
V
V
V
°C
°C
T J
Junction Temperature
256-Ball CSP_BGA (17 mm × 17 mm) @ T AMBIENT =–40°C to +85°C –40
+115
°C
T J
T J
Junction Temperature
Junction Temperature
297-Ball PBGA @ T AMBIENT = 0°C to +70°C
297-Ball PBGA @ T AMBIENT = –40°C to +85°C
0
–40
+95
+115
°C
°C
1
2
3
4
5
Internal voltage (V DDINT ) regulator tolerance is –5% to +10% for all models. 
See Ordering Guide on Page 63 . 
The internal voltage regulation feature is not available. External voltage regulation is required to ensure correct operation. 
The ADSP-BF561 is 3.3 V tolerant (always accepts up to 3.6 V maximum V IH ), but voltage compliance (on outputs, V OH ) depends on the input V DDEXT , because V OH (maximum)  
approximately equals V DDEXT (maximum). This 3.3 V tolerance applies to bidirectional and input only pins.
Applies to all signal pins.
Table 9 and Table 10 describe the timing requirements for the
ADSP-BF561 clocks (t CCLK = 1/f CCLK ). Take care in selecting
MSEL, SSEL, and CSEL ratios so as not to exceed the maximum
(VCO) operating frequencies, as described in Absolute Maxi-
mum Ratings on Page 22 . Table 11 describes phase-locked loop
operating conditions.
core clock, system clock, and Voltage Controlled Oscillator
Table 9. Core Clock (CCLK) Requirements—500 MHz and 533 MHz Speed Grade Models 1
Parameter
Max
Unit
f CCLK
f CCLK
f CCLK
f CCLK
f CCLK
f CCLK
CCLK Frequency (V DDINT = 1.235 Vminimum) 2
CCLK Frequency (V DDINT = 1.1875 Vminimum)
CCLK Frequency (V DDINT = 1.045 Vminimum)
CCLK Frequency (V DDINT = 0.95 Vminimum)
CCLK Frequency (V DDINT = 0.855 Vminimum) 3
CCLK Frequency (V DDINT = 0.8 V minimum) 3
533
500
444
350
300
250
MHz
MHz
MHz
MHz
MHz
MHz
1
2
3
See Ordering Guide on Page 63 . 
External Voltage regulation is required on automotive grade models (see Ordering Guide on Page 63 ) to ensure correct operation. 
Not applicable to automotive grade models. See Ordering Guide on Page 63 . 
Table 10. Core Clock (CCLK) Requirements—600 MHz Speed Grade Models 1
Parameter
Max
Unit
f CCLK
f CCLK
f CCLK
f CCLK
f CCLK
f CCLK
f CCLK
CCLK Frequency (V DDINT = 1.2825 V minimum) 2
CCLK Frequency (V DDINT = 1.235 V minimum)
CCLK Frequency (V DDINT = 1.1875 V minimum)
CCLK Frequency (V DDINT = 1.045 V minimum)
CCLK Frequency (V DDINT = 0.95 V minimum)
CCLK Frequency (V DDINT = 0.855 V minimum)
CCLK Frequency (V DDINT = 0.8 V minimum)
600
533
500
444
350
300
250
MHz
MHz
MHz
MHz
MHz
MHz
MHz
1
2
See Ordering Guide on Page 63 . 
External voltage regulator required to ensure proper operation at 600 MHz. 
Rev. E |
Page 20 of 64 |
September 2009
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ADSP-BF561SKBCZENG 制造商:Analog Devices 功能描述:- Trays
ADSP-BF561SKBZ500 功能描述:IC DSP 32BIT 500MHZ 297PBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:Blackfin® 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI，以太网，RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA，FCBGA 供应商设备封装:431-FCPBGA（20x20） 包装:托盘
ADSP-BF561SKBZ500 制造商:Analog Devices 功能描述:Digital Signal Processor IC
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